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authorKrzysztof Kozlowski <krzk@kernel.org>2019-09-23 19:15:14 +0300
committerKrzysztof Kozlowski <krzk@kernel.org>2019-10-02 18:39:57 +0300
commit55125ae92befec9a9013f52cf12d60cf36729e9c (patch)
tree29257a8da28faf8329ee119d1d7c4bd0e1bc8c13 /arch/arm/boot/dts/exynos4412.dtsi
parentd8304aa2ebc775db9caa9064d8ea911b18247206 (diff)
downloadlinux-55125ae92befec9a9013f52cf12d60cf36729e9c.tar.xz
ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412
Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid U3 (Exynos4412). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4412.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi19
1 files changed, 5 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 8b6d5875c75d..9b5fb4e54d7c 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -246,22 +246,13 @@
timer@10050000 {
compatible = "samsung,exynos4412-mct";
reg = <0x10050000 0x800>;
- interrupt-parent = <&mct_map>;
- interrupts = <0>, <1>, <2>, <3>, <4>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map =
- <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
- <1 &combiner 12 5>,
- <2 &combiner 12 6>,
- <3 &combiner 12 7>,
- <4 &gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
- };
+ interrupts-extended = <&gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ <&combiner 12 5>,
+ <&combiner 12 6>,
+ <&combiner 12 7>,
+ <&gic 1 12 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@10060000 {