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authorStuart Menefy <stuart.menefy@mathembedded.com>2019-02-19 16:03:36 +0300
committerKrzysztof Kozlowski <krzk@kernel.org>2019-03-18 21:54:16 +0300
commit7f396393b941e5594d927933175301d0db13f5a6 (patch)
tree9cd58565c856293b587c9484ece275b30f363395 /arch/arm/boot/dts/exynos5260-pinctrl.dtsi
parentc5432b1d44a787ae8e8d8097e05f7ed9cf563535 (diff)
downloadlinux-7f396393b941e5594d927933175301d0db13f5a6.tar.xz
ARM: dts: exynos: Add interrupts for dedicated EINTs on Exynos5260
Add the missing interrupt information for the GPIO lines with dedicated EINT interrupts. Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5260-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5260-pinctrl.dtsi16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
index b1edb20b789e..17e2f3e0d71e 100644
--- a/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5260-pinctrl.dtsi
@@ -153,6 +153,14 @@
#gpio-cells = <2>;
interrupt-controller;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};
@@ -161,6 +169,14 @@
#gpio-cells = <2>;
interrupt-controller;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
};