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authorKrzysztof Kozlowski <krzk@kernel.org>2019-09-23 19:15:17 +0300
committerKrzysztof Kozlowski <krzk@kernel.org>2019-10-02 18:39:57 +0300
commit04d6fe244181042f0a2cd7f3c54b85051655066d (patch)
tree5cf6031a413b519333f3fc08d8b42ae59c263e2b /arch/arm/boot/dts/exynos54xx.dtsi
parent6f135430d221b8e1c6453321cad35f8fd00f143d (diff)
downloadlinux-04d6fe244181042f0a2cd7f3c54b85051655066d.tar.xz
ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos54xx
Multi Core Timer node has interrupts routed to two different parents - GIC and combiner. This was modeled with a interrupt-map within a subnode but can be expressed in an easier and more common way, directly in the node itself. Tested on Odroid XU (Exynos5410), Odroid HC1 (Exynos5422) and Arndale Octa (Exynos5420). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos54xx.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos54xx.dtsi33
1 files changed, 12 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index ad7029bbfd47..8a162b5c5bf4 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -76,27 +76,18 @@
mct: timer@101c0000 {
compatible = "samsung,exynos4210-mct";
reg = <0x101c0000 0xb00>;
- interrupt-parent = <&mct_map>;
- interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
- <8>, <9>, <10>, <11>;
-
- mct_map: mct-map {
- #interrupt-cells = <1>;
- #address-cells = <0>;
- #size-cells = <0>;
- interrupt-map = <0 &combiner 23 3>,
- <1 &combiner 23 4>,
- <2 &combiner 25 2>,
- <3 &combiner 25 3>,
- <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
- <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
- <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
- <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
- <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
- <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
- <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
- <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
- };
+ interrupts-extended = <&combiner 23 3>,
+ <&combiner 23 4>,
+ <&combiner 25 2>,
+ <&combiner 25 3>,
+ <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog: watchdog@101d0000 {