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authorDamien Riegel <damien.riegel@savoirfairelinux.com>2015-12-18 00:16:52 +0300
committerShawn Guo <shawnguo@kernel.org>2015-12-22 15:43:41 +0300
commit6989cc8fc7c161c661230a5dc80a690edbb28ab5 (patch)
treec982944597740d275353e0f05df9ae4ca049a8d6 /arch/arm/boot/dts/imx51-ts4800.dts
parent419e202b260ba5913affd7cb3c36f129c036e8f7 (diff)
downloadlinux-6989cc8fc7c161c661230a5dc80a690edbb28ab5.tar.xz
ARM: dts: TS-4800: drop uart rts/cts pin reservations
These pins are actually not routed for UARTs, they should not be reserved. Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51-ts4800.dts')
-rw-r--r--arch/arm/boot/dts/imx51-ts4800.dts4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts
index f1317f75365a..64ac55cca57e 100644
--- a/arch/arm/boot/dts/imx51-ts4800.dts
+++ b/arch/arm/boot/dts/imx51-ts4800.dts
@@ -157,8 +157,6 @@
fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
- MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
- MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
>;
};
@@ -173,8 +171,6 @@
fsl,pins = <
MX51_PAD_EIM_D25__UART3_RXD 0x1c5
MX51_PAD_EIM_D26__UART3_TXD 0x1c5
- MX51_PAD_EIM_D27__UART3_RTS 0x1c5
- MX51_PAD_EIM_D24__UART3_CTS 0x1c5
>;
};
};