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authorShawn Guo <shawn.guo@linaro.org>2012-08-11 18:06:26 +0400
committerShawn Guo <shawn.guo@linaro.org>2012-09-11 12:26:48 +0400
commit497ae1747b8c52fde4ab7e9987326ca43886b652 (patch)
tree0e70b52b9e682a8217fef17a988ceacd95a47e83 /arch/arm/boot/dts/imx6q-sabresd.dts
parent9e3c00665d915c4f5645d43aec5a943b5eee55de (diff)
downloadlinux-497ae1747b8c52fde4ab7e9987326ca43886b652.tar.xz
ARM: dts: imx6q-sabresd: add pinctrl settings
Add pinctrl settings for existing devices in imx6q-sabresd.dts. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q-sabresd.dts')
-rw-r--r--arch/arm/boot/dts/imx6q-sabresd.dts25
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts
index 07509a181178..e596c28c214d 100644
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -22,28 +22,51 @@
};
soc {
-
aips-bus@02000000 { /* AIPS1 */
spba-bus@02000000 {
uart1: serial@02020000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_1>;
status = "okay";
};
};
+
+ iomuxc@020e0000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+ hog {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ 1402 0x80000000 /* MX6Q_PAD_NANDF_D0__GPIO_2_0 */
+ 1410 0x80000000 /* MX6Q_PAD_NANDF_D1__GPIO_2_1 */
+ 1418 0x80000000 /* MX6Q_PAD_NANDF_D2__GPIO_2_2 */
+ 1426 0x80000000 /* MX6Q_PAD_NANDF_D3__GPIO_2_3 */
+ >;
+ };
+ };
+ };
};
aips-bus@02100000 { /* AIPS2 */
ethernet@02188000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet_1>;
phy-mode = "rgmii";
status = "okay";
};
usdhc@02194000 { /* uSDHC2 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc2_1>;
cd-gpios = <&gpio2 2 0>;
wp-gpios = <&gpio2 3 0>;
status = "okay";
};
usdhc@02198000 { /* uSDHC3 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc3_1>;
cd-gpios = <&gpio2 0 0>;
wp-gpios = <&gpio2 1 0>;
status = "okay";