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authorTim Harvey <tharvey@gateworks.com>2015-11-07 01:40:32 +0300
committerShawn Guo <shawnguo@kernel.org>2015-12-22 15:42:23 +0300
commite726a9fdde2863697f885a8bef8af38c3c759eb3 (patch)
tree5dcbb792d1c4e9e4723cec87af62ac2959c78f2f /arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
parenta7668fda6b9987039e0dc0ea4e7262b019cce770 (diff)
downloadlinux-e726a9fdde2863697f885a8bef8af38c3c759eb3.tar.xz
ARM: dts: imx: ventana: Allow HDMI and LVDS to work simultaneously
Currently it is not possible to have HDMI and LVDS working simultaneously, because both ports try to use PLL5. Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be driven from independent sources. With this change the LDB pixel clock goes to 68.57 MHz, which is still within the valid range for the displays supported by the Ventana boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-gw54xx.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw54xx.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index fe71d36c1b66..7b50b1e55280 100644
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -142,6 +142,13 @@
status = "okay";
};
+&clks {
+ assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
+ assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
+ <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
+};
+
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;