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authorChristian Hemp <c.hemp@phytec.de>2014-11-14 16:32:25 +0300
committerShawn Guo <shawn.guo@linaro.org>2014-11-23 10:08:15 +0300
commit9924546b29f5f20d0596ebc76ab1ddc1f716cae4 (patch)
tree2d95b9a805a36ca967744a3abb1c54a5a2c1ab3a /arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
parentc082fd422e66df8e2492e27219192a773ccb72e5 (diff)
downloadlinux-9924546b29f5f20d0596ebc76ab1ddc1f716cae4.tar.xz
ARM: dts: imx6: phyFLEX: Add PCIe
Add PCIe support for Phytec phyFLEX-i.MX6 (PFL-A-02 and PBA-B-01). Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 8d718b55a07f..2d721095a369 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -283,6 +283,10 @@
>;
};
+ pinctrl_pcie: pciegrp {
+ fsl,pins = <MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000>;
+ };
+
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
@@ -353,6 +357,13 @@
};
};
+&pcie {
+ pinctrl-name = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ reset-gpio = <&gpio4 17 0>;
+ status = "disabled";
+};
+
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;