ARM: dts: imx6ul-14x14-evk: Enable the GPIO expander

Currently the 74LV595PW GPIO expander is not functional because its OE
pin is not driven low.

Make it funcional by passing the 'enable-gpios' property inside the
GPIO expander node.

After putting the OE pin in low state, the outputs of the 74LV595PW all
go low.

The two KSZ8081 Ethernet PHYs reset lines are driven from the
the GPIO expander and as they remain low, this causes the Ethernet
PHYs not to be detected.

There is one solution to this problem as suggested by Andrew Lunn:

"Some devices will respond to MDIO while held in reset, some don't.
If your PHYs don't you need to add a compatible of the form
ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$ with the PHY ID. The PHY
will then be probed, independent of if it can be found on the bus or
not, and that probing will enable the GPIO."

So pass the "ethernet-phy-id0022.1560" for the KSZ8081 PHYs so that they
both can be functional after 74LV595PW is activated.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

1 files changed, 3 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
index a6dbfa85bb6a..8bf845afd166 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
@@ -113,6 +113,7 @@
 			reg = <0>;
 			registers-number = <1>;
 			spi-max-frequency = <100000>;
+			enable-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
 		};
 	};
 
@@ -169,6 +170,7 @@
 		#size-cells = <0>;
 
 		ethphy0: ethernet-phy@2 {
+			compatible = "ethernet-phy-id0022.1560";
 			reg = <2>;
 			micrel,led-mode = <1>;
 			clocks = <&clks IMX6UL_CLK_ENET_REF>;
@@ -176,6 +178,7 @@
 		};
 
 		ethphy1: ethernet-phy@1 {
+			compatible = "ethernet-phy-id0022.1560";
 			reg = <1>;
 			micrel,led-mode = <1>;
 			clocks = <&clks IMX6UL_CLK_ENET2_REF>;