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authorOlof Johansson <olof@lixom.net>2013-06-01 10:17:39 +0400
committerOlof Johansson <olof@lixom.net>2013-06-01 10:17:39 +0400
commited2670b334a1050aa122cd9ca53c7a545642c46b (patch)
treedc881bb034a0d27194d52cd2b9011e84a6eca3ab /arch/arm/boot/dts/kirkwood-6282.dtsi
parenta640874bb6596f09160b1f39699618f635465e12 (diff)
parent0d0632f523fa040b307688ae421a1debf79af2d7 (diff)
downloadlinux-ed2670b334a1050aa122cd9ca53c7a545642c46b.tar.xz
Merge tag 'pcie_kw-3.11' of git://git.infradead.org/users/jcooper/linux into next/soc
From Jason Cooper: mvebu pcie driver (kirkwood) for v3.11 - kirkwood - enable pcie driver - migrate boards over to pcie dt init depends - mvebu/pcie - mvebu/of_pci Signed-off-by: Olof Johansson <olof@lixom.net> * tag 'pcie_kw-3.11' of git://git.infradead.org/users/jcooper/linux: arm: kirkwood: convert db-88f6281/db-88f6282 to the Device Tree arm: kirkwood: convert QNAP TS219 to use DT for the PCIe interface arm: kirkwood: convert ZyXEL NSA310 to use DT for the PCIe interface arm: kirkwood: convert MPL CEC4 to use DT for the PCIe interface arm: kirkwood: convert Iomega Iconnect to use DT for the PCIe interface arm: kirkwood: add SoC-level Device Tree data for PCIe interfaces arm: kirkwood: move PCIe window init to legacy driver pci: mvebu: enable driver usage on Kirkwood
Diffstat (limited to 'arch/arm/boot/dts/kirkwood-6282.dtsi')
-rw-r--r--arch/arm/boot/dts/kirkwood-6282.dtsi48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
index 23991e45bc55..66a751ab5516 100644
--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -65,5 +65,53 @@
clocks = <&gate_clk 7>;
status = "disabled";
};
+
+ pcie-controller {
+ compatible = "marvell,kirkwood-pcie";
+ status = "disabled";
+ device_type = "pci";
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ bus-range = <0x00 0xff>;
+
+ ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
+ 0x82000000 0 0x00044000 0x00044000 0 0x00002000 /* Port 1.0 registers */
+ 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
+ 0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
+
+ pcie@1,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
+ reg = <0x0800 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &intc 9>;
+ marvell,pcie-port = <0>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gate_clk 2>;
+ status = "disabled";
+ };
+
+ pcie@2,0 {
+ device_type = "pci";
+ assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
+ reg = <0x1000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &intc 10>;
+ marvell,pcie-port = <1>;
+ marvell,pcie-lane = <0>;
+ clocks = <&gate_clk 18>;
+ status = "disabled";
+ };
+ };
};
};