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authorQuentin Armitage <quentin@armitage.org.uk>2013-09-19 15:00:29 +0400
committerJason Cooper <jason@lakedaemon.net>2013-09-20 07:16:20 +0400
commitddf7e399024aa908573a08d6339cefa6253b83db (patch)
treeb4438e5a7f32d2f6c0fbc588c44b995880dc1e26 /arch/arm/boot/dts/kirkwood.dtsi
parent3a3c07001b0d4a5eec83bb87284048cd75b81510 (diff)
downloadlinux-ddf7e399024aa908573a08d6339cefa6253b83db.tar.xz
ARM: kirkwood: Fix address of second XOR engine
There appears to be an error in the second address of the second XOR engine in the Kirkwood SoC device tree, which is specified as 0xd0b00 but should be 0x60b00. For confirmation of address see table 581 page 658 of: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf Also see definition of XOR1_HIGH_PHYS_BASE in arch/arm/mach-kirkwood/include/mach/kirkwood.h Signed-off-by: Quentin Armitage <quentin@armitage.org.uk> Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/kirkwood.dtsi')
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 858099f5b966..1335b2e1bed4 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -168,7 +168,7 @@
xor@60900 {
compatible = "marvell,orion-xor";
reg = <0x60900 0x100
- 0xd0B00 0x100>;
+ 0x60B00 0x100>;
status = "okay";
clocks = <&gate_clk 16>;