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authorYangbo Lu <yangbo.lu@nxp.com>2020-05-22 04:30:52 +0300
committerShawn Guo <shawnguo@kernel.org>2020-07-13 13:44:42 +0300
commit5656bb3857c4904d1dec6e1b8f876c1c0337274e (patch)
treebcdbf019a4db95052deb3500ba9f0eeff7aaf0b0 /arch/arm/boot/dts/ls1021a.dtsi
parent915e19686f5991bf6dd9160ef6830041083c894f (diff)
downloadlinux-5656bb3857c4904d1dec6e1b8f876c1c0337274e.tar.xz
ARM: dts: ls1021a: output PPS signal on FIPER2
The timer fixed interval period pulse generator register is used to generate periodic pulses. The down count register loads the value programmed in the fixed period interval (FIPER). At every tick of the timer accumulator overflow, the counter decrements by the value of TMR_CTRL[TCLK_PERIOD]. It generates a pulse when the down counter value reaches zero. It reloads the down counter in the cycle following a pulse. To use the TMR_FIPER register to generate desired periodic pulses. The value should programmed is, desired_period - tclk_period Current tmr-fiper2 value is to generate 100us periodic pulses. (But the value should have been 99995, not 99990. The tclk_period is 5.) This patch is to generate 1 second periodic pulses with value 999999995 programmed which is more desired by user. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 760a68c163c8..b2ff27af090e 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -772,7 +772,7 @@
fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xaaaaaaab>;
fsl,tmr-fiper1 = <999999995>;
- fsl,tmr-fiper2 = <99990>;
+ fsl,tmr-fiper2 = <999999995>;
fsl,max-adj = <499999999>;
fsl,extts-fifo;
};