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authorRobert Jarzmik <robert.jarzmik@free.fr>2016-04-05 09:35:51 +0300
committerRobert Jarzmik <robert.jarzmik@free.fr>2016-04-20 21:20:18 +0300
commit85deaec8e900a98e0ab422620035803541965ef1 (patch)
tree0b1f081035d3aa9cbcc985004a3a531fd1e9079e /arch/arm/boot/dts/pxa3xx.dtsi
parentbc0c0c302925ff02fab06633ac2f732323b9e6f9 (diff)
downloadlinux-85deaec8e900a98e0ab422620035803541965ef1.tar.xz
ARM: dts: pxa: add pxa3xx pwm nodes
The pxa3xx SoC has 4 PWMs, exactly as the pxa27x does. Add them to the description. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Diffstat (limited to 'arch/arm/boot/dts/pxa3xx.dtsi')
-rw-r--r--arch/arm/boot/dts/pxa3xx.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi
index fec47bcd8292..5767ed4957ae 100644
--- a/arch/arm/boot/dts/pxa3xx.dtsi
+++ b/arch/arm/boot/dts/pxa3xx.dtsi
@@ -95,6 +95,38 @@
clocks = <&clks CLK_USBHOST>;
status = "disabled";
};
+
+ pwm0: pwm@40b00000 {
+ compatible = "marvell,pxa270-pwm";
+ reg = <0x40b00000 0x10>;
+ #pwm-cells = <1>;
+ clocks = <&clks CLK_PWM0>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@40b00010 {
+ compatible = "marvell,pxa270-pwm";
+ reg = <0x40b00010 0x10>;
+ #pwm-cells = <1>;
+ clocks = <&clks CLK_PWM1>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@40c00000 {
+ compatible = "marvell,pxa270-pwm";
+ reg = <0x40c00000 0x10>;
+ #pwm-cells = <1>;
+ clocks = <&clks CLK_PWM0>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@40c00010 {
+ compatible = "marvell,pxa270-pwm";
+ reg = <0x40c00010 0x10>;
+ #pwm-cells = <1>;
+ clocks = <&clks CLK_PWM1>;
+ status = "disabled";
+ };
};
clocks {