diff options
| author | Krishna Kurapati <quic_kriskura@quicinc.com> | 2024-01-25 21:59:19 +0300 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-01-28 01:42:02 +0300 |
| commit | 6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f (patch) | |
| tree | a1a0e1fefac75ea623d832cc6b20e0c5c89c1acc /arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | |
| parent | 2c6597c72e9722ac020102d5af40126df0437b82 (diff) | |
| download | linux-6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f.tar.xz | |
arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.
Also modify order of interrupts in accordance to bindings update.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-sdx65.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi index 40591a4da6a4..2b8635f0e38d 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi @@ -501,14 +501,16 @@ <&gcc GCC_USB30_MASTER_CLK>; assigned-clock-rates = <19200000>, <200000000>; - interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 76 IRQ_TYPE_LEVEL_HIGH>, + interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 19 IRQ_TYPE_EDGE_BOTH>, <&pdc 18 IRQ_TYPE_EDGE_BOTH>, - <&pdc 19 IRQ_TYPE_EDGE_BOTH>; - interrupt-names = "hs_phy_irq", - "ss_phy_irq", + <&pdc 76 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", "dm_hs_phy_irq", - "dp_hs_phy_irq"; + "ss_phy_irq"; power-domains = <&gcc USB30_GDSC>; |