summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/r8a7792-blanche.dts
diff options
context:
space:
mode:
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2016-07-14 23:21:15 +0300
committerSimon Horman <horms+renesas@verge.net.au>2016-08-08 13:53:04 +0300
commit38584104eafb6ed40ca06c8421dcc369c9015c1d (patch)
tree4a111048ce4c8ee25a4fb1752dfffc64843343a3 /arch/arm/boot/dts/r8a7792-blanche.dts
parentf947c02a0f86dffa5258ef347c6b6980953a9679 (diff)
downloadlinux-38584104eafb6ed40ca06c8421dcc369c9015c1d.tar.xz
ARM: dts: blanche: add CAN0 support
Define the Blanche board dependent part of the CAN0 device node along with the CAN_CLK crystal. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7792-blanche.dts')
-rw-r--r--arch/arm/boot/dts/r8a7792-blanche.dts16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7792-blanche.dts b/arch/arm/boot/dts/r8a7792-blanche.dts
index 4777a609ff81..eeffba870211 100644
--- a/arch/arm/boot/dts/r8a7792-blanche.dts
+++ b/arch/arm/boot/dts/r8a7792-blanche.dts
@@ -60,6 +60,10 @@
clock-frequency = <20000000>;
};
+&can_clk {
+ clock-frequency = <48000000>;
+};
+
&pfc {
scif0_pins: scif0 {
groups = "scif0_data";
@@ -81,6 +85,11 @@
function = "lbsc";
};
};
+
+ can0_pins: can0 {
+ groups = "can0_data", "can_clk";
+ function = "can0";
+ };
};
&scif0 {
@@ -96,3 +105,10 @@
status = "okay";
};
+
+&can0 {
+ pinctrl-0 = <&can0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};