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authorRocky Hao <rocky.hao@rock-chips.com>2017-05-17 13:16:17 +0300
committerHeiko Stuebner <heiko@sntech.de>2017-05-19 14:25:15 +0300
commit2b3f2f37ef4d7b9f233d7dc9529b789709b6c988 (patch)
treed63a9a2747f1942e4df4c5d4185efd918ce727f8 /arch/arm/boot/dts/rk322x.dtsi
parent9f12da43c327b4eed4c7dc47a8ac37b05e39c3d0 (diff)
downloadlinux-2b3f2f37ef4d7b9f233d7dc9529b789709b6c988.tar.xz
ARM: dts: rockchip: set a sane frequence for tsadc on rk322x
Update freq of tsadc's working clock as 32768 hz, if not set, tsadc will work at a default frequence. Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk322x.dtsi')
-rw-r--r--arch/arm/boot/dts/rk322x.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index c09e17cc4ab0..df574135797a 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -434,6 +434,8 @@
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
+ assigned-clocks = <&cru SCLK_TSADC>;
+ assigned-clock-rates = <32768>;
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
pinctrl-names = "init", "default", "sleep";