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authorHeiko Stuebner <heiko@sntech.de>2018-06-16 17:55:17 +0300
committerHeiko Stuebner <heiko@sntech.de>2018-06-18 13:31:52 +0300
commitce76de984649bf85c81ee437eea282d10ba0dbb3 (patch)
treea80d089c05048c96204c29a49be51a77a1a751b8 /arch/arm/boot/dts/rk3288-veyron.dtsi
parent0bac06df36abb3b74e146091ca51c8c6d70d69a6 (diff)
downloadlinux-ce76de984649bf85c81ee437eea282d10ba0dbb3.tar.xz
ARM: dts: rockchip: convert rk3288 to operating-points-v2
Operating points need to be present in each cpu core using it, not only the first one. With operating-points-v1 this would require duplicating this table into each cpu node. With opp-v2 we can share the same table on all nodes. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-veyron.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3288-veyron.dtsi36
1 files changed, 20 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 823c7ed47fcf..2075120cfc4d 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -91,22 +91,26 @@
&cpu0 {
cpu0-supply = <&vdd_cpu>;
- operating-points = <
- /* KHz uV */
- 1800000 1400000
- 1704000 1350000
- 1608000 1300000
- 1512000 1250000
- 1416000 1200000
- 1200000 1100000
- 1008000 1050000
- 816000 1000000
- 696000 950000
- 600000 900000
- 408000 900000
- 216000 900000
- 126000 900000
- >;
+};
+
+/* rk3288-c used in Veyron Chrome-devices has slightly changed OPPs */
+&cpu_opp_table {
+ /delete-node/ opp-312000000;
+
+ opp-1512000000 {
+ opp-microvolt = <1250000>;
+ };
+ opp-1608000000 {
+ opp-microvolt = <1300000>;
+ };
+ opp-1704000000 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-microvolt = <1350000>;
+ };
+ opp-1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <1400000>;
+ };
};
&emmc {