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authorArnd Bergmann <arnd@arndb.de>2014-09-05 00:01:33 +0400
committerArnd Bergmann <arnd@arndb.de>2014-09-05 00:01:33 +0400
commit8baebe30642e76a5209093e75c7bdb4c8b6394eb (patch)
tree26a893d374941a32381fa90179875d2343f2a98c /arch/arm/boot/dts/rk3xxx.dtsi
parentc30131cf20a5a917a13f4bdefd71f2a545cb3fe6 (diff)
parentac42f481b75b98076b47fac60796657508f80abe (diff)
downloadlinux-8baebe30642e76a5209093e75c7bdb4c8b6394eb.tar.xz
Merge tag 'v3.18-rockchip-dma' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "rockchip dma support" from Heiko Stuebner: Enable the AMBA bus and add necessary dma-controller dts nodes * tag 'v3.18-rockchip-dma' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add rk3066 and rk3188 dma controllers ARM: dts: rockchip: add rk3288 dma controllers ARM: rockchip: enable the AMBA bus Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3xxx.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3xxx.dtsi38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index cce4a07d6e04..bdc92a42def8 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -28,6 +28,44 @@
i2c4 = &i2c4;
};
+ amba {
+ compatible = "arm,amba-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ dmac1_s: dma-controller@20018000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x20018000 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&cru ACLK_DMA1>;
+ clock-names = "apb_pclk";
+ };
+
+ dmac1_ns: dma-controller@2001c000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x2001c000 0x4000>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&cru ACLK_DMA1>;
+ clock-names = "apb_pclk";
+ status = "disabled";
+ };
+
+ dmac2: dma-controller@20078000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x20078000 0x4000>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ clocks = <&cru ACLK_DMA2>;
+ clock-names = "apb_pclk";
+ };
+ };
+
xin24m: oscillator {
compatible = "fixed-clock";
clock-frequency = <24000000>;