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authorPratyush Anand <pratyush.anand@st.com>2014-04-14 13:57:36 +0400
committerViresh Kumar <viresh.kumar@linaro.org>2014-07-14 09:34:43 +0400
commit549f3ae1beb187e53f4cec7ee0cbe79b01d27111 (patch)
treec0741434bbeefe7fb1a59e4e5f3f35327ea7734e /arch/arm/boot/dts/spear1340-evb.dts
parent23b7ad23cb95db188403677c51c997338fb9effd (diff)
downloadlinux-549f3ae1beb187e53f4cec7ee0cbe79b01d27111.tar.xz
ARM: SPEAr13xx: Add pcie and miphy DT nodes
This patch adds necessary DT nodes for pcie controllers and miphys for SPEAr13xx SoCs. SPEAr1310 has 3 PCIe ports and SPEAr1340 has 1, which are multiplexed with ahci/sata pins. By default evaluation board of both controller works in ahci mode. Because of this, these nodes are marked "disabled" by default. In order to use pcie controller on evaluation boards do necessary modifications on board and enable (By replacing "disabled" with "okay") pcie and miphy from respective 'evb' dtsi file. Phy specific initialization was previously done from spear1340.c, which isn't required anymore as we have separate drivers for it. Remove it. Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Pratyush Anand <pratyush.anand@st.com> Signed-off-by: Mohit Kumar <mohit.kumar@st.com> [viresh: fixed logs/cclist/checkpatch warnings, clubbed multiple patches into one] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/spear1340-evb.dts')
-rw-r--r--arch/arm/boot/dts/spear1340-evb.dts4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts
index d6c30ae0a8d7..b23e05ed1d60 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ b/arch/arm/boot/dts/spear1340-evb.dts
@@ -122,6 +122,10 @@
status = "okay";
};
+ miphy@eb800000 {
+ status = "okay";
+ };
+
dma@ea800000 {
status = "okay";
};