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authorYann Gautier <yann.gautier@foss.st.com>2022-01-12 19:33:55 +0300
committerAlexandre Torgue <alexandre.torgue@foss.st.com>2022-02-07 13:16:27 +0300
commita7f6433feda4465d83b450dd844ca5c61322120f (patch)
tree8605fed86559582d882822a9e44273f114df5d42 /arch/arm/boot/dts/stm32mp131.dtsi
parentefdf018e31e0bbd6a664ce8af5060432e13a1e31 (diff)
downloadlinux-a7f6433feda4465d83b450dd844ca5c61322120f.tar.xz
ARM: dts: stm32: add SDMMC2 in STM32MP13 DT
STM32MP13 embeds 2 instances of SDMMC peripheral. Add the required information in SoC device tree file. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp131.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32mp131.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 7189cba6b256..a1efb545ca3d 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -135,6 +135,20 @@
status = "disabled";
};
+ sdmmc2: mmc@58007000 {
+ compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x20253180>;
+ reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&clk_pll4_p>;
+ clock-names = "apb_pclk";
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <130000000>;
+ status = "disabled";
+ };
+
iwdg2: watchdog@5a002000 {
compatible = "st,stm32mp1-iwdg";
reg = <0x5a002000 0x400>;