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authorOlof Johansson <olof@lixom.net>2017-04-19 15:39:05 +0300
committerOlof Johansson <olof@lixom.net>2017-04-19 15:39:05 +0300
commita9465b581da59ea20daadfa9c0c0d69053cedd85 (patch)
treecd6002d60b572355485a435c25d969a71b55b134 /arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
parentec4c22e7c348885ab2d928e3ee1cac04e91fb19d (diff)
parent72897fa31fcf6222a11c6ebb0bcca25628bb1f7c (diff)
downloadlinux-a9465b581da59ea20daadfa9c0c0d69053cedd85.tar.xz
Merge tag 'sunxi-dt-h3-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Allwinner H3 DT changes for 4.12 H3 patches for 4.12, which are mostly related to reworking the H3 DTSI to be usable on the arm64 H5 DTSI, that shares almost everything with the H3 but the CPU cores. We also have some new device addition (USB, mostly) that would conflict otherwise. * tag 'sunxi-dt-h3-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: sun8i: h2+: enable USB OTG for Orange Pi Zero board ARM: sun8i: h3: enable USB OTG on Orange Pi One ARM: sunxi: h3/h5: add usb_otg and OHCI/EHCI for usbc0 on H3/H5 arm: sun8i: h3: split Allwinner H3 .dtsi arm: sun8i: h3: correct the GIC compatible in H3 to gic-400 arm: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI arm: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3-orangepi-one.dts')
-rw-r--r--arch/arm/boot/dts/sun8i-h3-orangepi-one.dts22
1 files changed, 21 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index ea8fd1325356..5fea430e0eb1 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -89,6 +89,10 @@
};
};
+&ehci0 {
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
@@ -103,6 +107,10 @@
status = "okay";
};
+&ohci0 {
+ status = "okay";
+};
+
&ohci1 {
status = "okay";
};
@@ -126,6 +134,11 @@
};
};
+&reg_usb0_vbus {
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
@@ -150,7 +163,14 @@
status = "disabled";
};
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&usbphy {
- /* USB VBUS is always on */
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};