Merge branch 'staging/for_v3.4' into v4l_for_linus

* staging/for_v3.4: (10117 commits)
  [media] update CARDLIST.em28xx
  [media] partially reverts changeset fa5527c
  [media] stb0899: fix the limits for signal strength values
  [media] em28xx: support for 2304:0242 PCTV QuatroStick (510e)
  [media] em28xx: support for 2013:0251 PCTV QuatroStick nano (520e)
  [media] -EINVAL -> -ENOTTY
  [media] gspca - sn9c20x: Cleanup source
  [media] gspca - sn9c20x: Simplify register write for capture start/stop
  [media] gspca - sn9c20x: Add automatic JPEG compression mechanism
  [media] gspca - sn9c20x: Greater delay in case of sensor no response
  [media] gspca - sn9c20x: Optimize the code of write sequences
  [media] gspca - sn9c20x: Add the JPEG compression quality control
  [media] gspca - sn9c20x: Add a delay after Omnivision sensor reset
  [media] gspca - sn9c20x: Propagate USB errors to higher level
  [media] gspca - sn9c20x: Use the new video control mechanism
  [media] gspca - sn9c20x: Fix loss of frame start
  [media] gspca - zc3xx: Lack of register 08 value for sensor cs2102k
  [media] gspca - ov534_9: Add brightness to OmniVision 5621 sensor
  [media] gspca - zc3xx: Add V4L2_CID_JPEG_COMPRESSION_QUALITY control support
  [media] pvrusb2: fix 7MHz & 8MHz DVB-T tuner support for HVR1900 rev D1F5
  ...

1 files changed, 40 insertions, 5 deletions

diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 3f9abd6b6964..c7d3b87f29df 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -1,24 +1,59 @@
 /dts-v1/;
 
-/memreserve/ 0x1c000000 0x04000000;
 /include/ "tegra20.dtsi"
 
 / {
 	model = "NVIDIA Tegra2 Ventana evaluation board";
 	compatible = "nvidia,ventana", "nvidia,tegra20";
 
-	chosen {
-		bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init";
-	};
-
 	memory {
 		reg = < 0x00000000 0x40000000 >;
 	};
 
+	i2c@7000c000 {
+		clock-frequency = <400000>;
+	};
+
+	i2c@7000c400 {
+		clock-frequency = <400000>;
+	};
+
+	i2c@7000c500 {
+		clock-frequency = <400000>;
+	};
+
+	i2c@7000d000 {
+		clock-frequency = <400000>;
+	};
+
+	serial@70006000 {
+		status = "disable";
+	};
+
+	serial@70006040 {
+		status = "disable";
+	};
+
+	serial@70006200 {
+		status = "disable";
+	};
+
 	serial@70006300 {
 		clock-frequency = < 216000000 >;
 	};
 
+	serial@70006400 {
+		status = "disable";
+	};
+
+	sdhci@c8000000 {
+		status = "disable";
+	};
+
+	sdhci@c8000200 {
+		status = "disable";
+	};
+
 	sdhci@c8000400 {
 		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
 		wp-gpios = <&gpio 57 0>; /* gpio PH1 */