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authorAlexandre Courbot <acourbot@nvidia.com>2014-07-08 16:32:14 +0400
committerThierry Reding <treding@nvidia.com>2014-07-17 17:02:14 +0400
commit2236927d9820199bb6f29f2a89b1783c4513d34f (patch)
treef4b669978b0d6c7b019cc4a83141aa1f9bf4a64e /arch/arm/boot/dts/tegra114-roth.dts
parentee913f7a15124d85db46833889561eb876f29de0 (diff)
downloadlinux-2236927d9820199bb6f29f2a89b1783c4513d34f.tar.xz
ARM: tegra: roth: add display DT node
Tegra DSI support has been fixed to support continuous clock behavior that the panel used on SHIELD requires, so finally add its device tree node since it is functional. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra114-roth.dts')
-rw-r--r--arch/arm/boot/dts/tegra114-roth.dts22
1 files changed, 19 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/tegra114-roth.dts b/arch/arm/boot/dts/tegra114-roth.dts
index ba210c6e189f..c7c6825f11fb 100644
--- a/arch/arm/boot/dts/tegra114-roth.dts
+++ b/arch/arm/boot/dts/tegra114-roth.dts
@@ -28,6 +28,22 @@
reg = <0x80000000 0x79600000>;
};
+ host1x@50000000 {
+ dsi@54300000 {
+ status = "okay";
+
+ vdd-supply = <&vdd_1v2_ap>;
+
+ panel@0 {
+ compatible = "lg,lh500wx1-sd03";
+ reg = <0>;
+
+ power-supply = <&vdd_lcd>;
+ backlight = <&backlight>;
+ };
+ };
+ };
+
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@@ -811,7 +827,6 @@
regulator-name = "vdd-1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
- regulator-always-on;
regulator-boot-on;
};
@@ -858,10 +873,11 @@
regulator-name = "vdd-2v8-display";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
+ regulator-always-on;
regulator-boot-on;
};
- ldo3 {
+ vdd_1v2_ap: ldo3 {
regulator-name = "avdd-1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
@@ -1048,7 +1064,7 @@
regulator-boot-on;
};
- regulator@1 {
+ vdd_lcd: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "vdd_lcd_1v8";