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authorStephen Warren <swarren@nvidia.com>2012-11-10 03:58:11 +0400
committerStephen Warren <swarren@nvidia.com>2012-11-16 20:14:26 +0400
commit20ffbd7d6b357ee2f8a607c63805fb2c1f78effb (patch)
tree67ef301dcf10068949f4c9284fb252ff762e5ae9 /arch/arm/boot/dts/tegra20-harmony.dts
parented39097c2ad97688d2734600ca20b7d66c311b92 (diff)
downloadlinux-20ffbd7d6b357ee2f8a607c63805fb2c1f78effb.tar.xz
ARM: tegra: harmony: enable HDMI port
Enable host1x, and the HDMI output. Harmony also has an optional LCD, and a VGA output. The former isn't enabled due to potential issues with having multiple outputs enabled. The latter isn't enabled since the driver doesn't support VGA yet anyway. Correct DDC I2C frequency to 100KHz. Based on work by Thierry Reding for TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-harmony.dts')
-rw-r--r--arch/arm/boot/dts/tegra20-harmony.dts20
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index a3f2f383c049..43eb72af8948 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -10,6 +10,18 @@
reg = <0x00000000 0x40000000>;
};
+ host1x {
+ hdmi {
+ status = "okay";
+
+ vdd-supply = <&hdmi_vdd_reg>;
+ pll-supply = <&hdmi_pll_reg>;
+
+ nvidia,ddc-i2c-bus = <&hdmi_ddc>;
+ nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ };
+ };
+
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@@ -262,9 +274,9 @@
};
};
- i2c@7000c400 {
+ hdmi_ddc: i2c@7000c400 {
status = "okay";
- clock-frequency = <400000>;
+ clock-frequency = <100000>;
};
i2c@7000c500 {
@@ -369,13 +381,13 @@
regulator-max-microvolt = <1800000>;
};
- ldo7 {
+ hdmi_vdd_reg: ldo7 {
regulator-name = "vdd_ldo7,avdd_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
- ldo8 {
+ hdmi_pll_reg: ldo8 {
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;