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authorThierry Reding <treding@nvidia.com>2014-07-25 22:40:02 +0400
committerOlof Johansson <olof@lixom.net>2014-07-30 23:48:52 +0400
commit067cc28670c53f919ebf821bc123f1097ae4283b (patch)
treeb06625ff636ef92cf81609f577447b2fa384f38e /arch/arm/boot/dts/tegra20-paz00.dts
parent27ff34ef48fee78b61c25be4323c2c96db93d1f1 (diff)
downloadlinux-067cc28670c53f919ebf821bc123f1097ae4283b.tar.xz
ARM: tegra: paz00: Fix some indentation inconsistencies
Indentation of the clock property used a hodgepodge of tabs and spaces. Make them more consistent (tabs for indentation followed by spaces for alignment). Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-paz00.dts')
-rw-r--r--arch/arm/boot/dts/tegra20-paz00.dts6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 9a39a8001f78..d4438e30de45 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -296,7 +296,7 @@
request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
slave-addr = <138>;
clocks = <&tegra_car TEGRA20_CLK_I2C3>,
- <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
+ <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
clock-names = "div-clk", "fast-clk";
resets = <&tegra_car 67>;
reset-names = "i2c";
@@ -589,8 +589,8 @@
GPIO_ACTIVE_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
- <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
- <&tegra_car TEGRA20_CLK_CDEV1>;
+ <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
+ <&tegra_car TEGRA20_CLK_CDEV1>;
clock-names = "pll_a", "pll_a_out0", "mclk";
};
};