diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2019-10-25 01:14:13 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-10-29 22:29:17 +0300 |
| commit | 5ac1505008691d32734b890130e5f637f5c4bc5c (patch) | |
| tree | 51e8e8bbeab9aa4cc16e5a18efbcb4fbb7bff974 /arch/arm/boot/dts/tegra20-paz00.dts | |
| parent | a60e68f98fbd2826ebc468fd3a3ce40be6ad29a6 (diff) | |
| download | linux-5ac1505008691d32734b890130e5f637f5c4bc5c.tar.xz | |
ARM: tegra: paz00: Add CPU Operating Performance Points
Utilize common Tegra20 CPU OPP table. CPU DVFS is available now on
AC100.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-paz00.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-paz00.dts | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 6e9fe192c648..85fce5bc72d6 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -3,6 +3,8 @@ #include <dt-bindings/input/input.h> #include "tegra20.dtsi" +#include "tegra20-cpu-opp.dtsi" +#include "tegra20-cpu-opp-microvolt.dtsi" / { model = "Toshiba AC100 / Dynabook AZ"; @@ -616,4 +618,16 @@ <&tegra_car TEGRA20_CLK_CDEV1>; clock-names = "pll_a", "pll_a_out0", "mclk"; }; + + cpus { + cpu0: cpu@0 { + cpu-supply = <&cpu_vdd_reg>; + operating-points-v2 = <&cpu0_opp_table>; + }; + + cpu@1 { + cpu-supply = <&cpu_vdd_reg>; + operating-points-v2 = <&cpu0_opp_table>; + }; + }; }; |