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authorOlof Johansson <olof@lixom.net>2015-01-22 02:17:56 +0300
committerOlof Johansson <olof@lixom.net>2015-01-22 02:17:56 +0300
commit7f09a46fe9e0d5cb68a16c50f06e11600830b340 (patch)
tree1ebb9781a5af4ed72ab8d96513356f03fa9022d4 /arch/arm/include
parent7fda91e731554336c08a8157b886387d890a9676 (diff)
parent29ee506d0d56f6d39cc237de2512f9cb5629cbf7 (diff)
downloadlinux-7f09a46fe9e0d5cb68a16c50f06e11600830b340.tar.xz
Merge tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc
Merge "at91: cleanup for 3.20 #2" from Nicolas Ferre: Second batch of cleanup for 3.20: - By reworking the PM code, we can remove the AT91 more specific initialization - We are using DT for SRAM initialization now, so we can remove its explicit mapping - The PMC clock driver now hosts IDLE function for at91rm9200 with other SoCs ones. * tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: (37 commits) ARM: at91: move at91rm9200_idle() to clk/at91/pmc.c ARM: at91: remove unused at91_init_sram ARM: at91: sama5d4: remove useless call to at91_init_sram ARM: at91: remove useless map_io ARM: at91: pm: prepare for multiplatform ARM: at91: pm: add UDP and UHP checks to newer SoCs ARM: at91: pm: use the mmio-sram pool to access SRAM ARM: at91: pm: rework cpu detection ARM: at91: dts: sama5d3: add ov2640 camera sensor support ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCK ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset} ARM: at91: dts: sama5d3: move the isi mck pin to mb ARM: at91: dts: sama5d3: add missing pins of isi ARM: at91: dts: sama5d3: split isi pinctrl ARM: at91: dts: sama5d3: add isi clock ARM: at91/dt: ethernut5: use at91sam9xe.dtsi ARM: at91/dt: Add a dtsi for at91sam9xe ARM: at91/dt: add SRAM nodes ARM: at91/dt: at91rm9200ek: enable RTC ARM: at91/dt: rm9200: add RTC node ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/debug/at91.S49
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
new file mode 100644
index 000000000000..80a6501b4d50
--- /dev/null
+++ b/arch/arm/include/debug/at91.S
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2003-2005 SAN People
+ *
+ * Debugging macro include header
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+*/
+
+#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
+#define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */
+#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
+#define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */
+#else
+/* On sama5d4, use USART3 as low level serial console */
+#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
+#endif
+
+/* Keep in sync with mach-at91/include/mach/hardware.h */
+#define AT91_IO_P2V(x) ((x) - 0x01000000)
+
+#define AT91_DBGU_SR (0x14) /* Status Register */
+#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
+#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */
+#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */
+
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =AT91_DBGU @ System peripherals (phys address)
+ ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
+ .endm
+
+ .macro senduart,rd,rx
+ strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
+ .endm
+
+ .macro waituart,rd,rx
+1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
+ tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
+ beq 1001b
+ .endm
+
+ .macro busyuart,rd,rx
+1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
+ tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
+ beq 1001b
+ .endm
+