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author | Tsahee Zidenberg <tsahee@annapurnalabs.com> | 2015-03-12 14:53:06 +0300 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2015-03-16 17:24:12 +0300 |
commit | e9e06f2853dd86791e665b2aa3c8acb5b0007e07 (patch) | |
tree | 8ee22e89f2e01f9442cfecd9b2608851526f2b98 /arch/arm/mach-alpine/alpine_cpu_pm.c | |
parent | 3c215e64eb00f1ea5c67de2141ba816cb3f3c682 (diff) | |
download | linux-e9e06f2853dd86791e665b2aa3c8acb5b0007e07.tar.xz |
ARM: Alpine: smp support
This patch introduces support for waking up secondary CPU cores on
Alpine platform.
Signed-off-by: Barak Wasserstrom <barak@annapurnalabs.com>
Signed-off-by: Tsahee Zidenberg <tsahee@annapurnalabs.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-alpine/alpine_cpu_pm.c')
-rw-r--r-- | arch/arm/mach-alpine/alpine_cpu_pm.c | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm/mach-alpine/alpine_cpu_pm.c b/arch/arm/mach-alpine/alpine_cpu_pm.c new file mode 100644 index 000000000000..121c77c4b53c --- /dev/null +++ b/arch/arm/mach-alpine/alpine_cpu_pm.c @@ -0,0 +1,70 @@ +/* + * Low-level power-management support for Alpine platform. + * + * Copyright (C) 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/regmap.h> +#include <linux/mfd/syscon.h> + +#include "alpine_cpu_pm.h" +#include "alpine_cpu_resume.h" + +/* NB registers */ +#define AL_SYSFAB_POWER_CONTROL(cpu) (0x2000 + (cpu)*0x100 + 0x20) + +static struct regmap *al_sysfabric; +static struct al_cpu_resume_regs __iomem *al_cpu_resume_regs; +static int wakeup_supported; + +int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr) +{ + if (!wakeup_supported) + return -ENOSYS; + + /* + * Set CPU resume address - + * secure firmware running on boot will jump to this address + * after setting proper CPU mode, and initialiing e.g. secure + * regs (the same mode all CPUs are booted to - usually HYP) + */ + writel(phys_resume_addr, + &al_cpu_resume_regs->per_cpu[phys_cpu].resume_addr); + + /* Power-up the CPU */ + regmap_write(al_sysfabric, AL_SYSFAB_POWER_CONTROL(phys_cpu), 0); + + return 0; +} + +void __init alpine_cpu_pm_init(void) +{ + struct device_node *np; + uint32_t watermark; + + al_sysfabric = syscon_regmap_lookup_by_compatible("al,alpine-sysfabric-service"); + + np = of_find_compatible_node(NULL, NULL, "al,alpine-cpu-resume"); + al_cpu_resume_regs = of_iomap(np, 0); + + wakeup_supported = !IS_ERR(al_sysfabric) && al_cpu_resume_regs; + + if (wakeup_supported) { + watermark = readl(&al_cpu_resume_regs->watermark); + wakeup_supported = (watermark & AL_CPU_RESUME_MAGIC_NUM_MASK) + == AL_CPU_RESUME_MAGIC_NUM; + } +} |