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authorSekhar Nori <nsekhar@ti.com>2010-07-20 15:16:49 +0400
committerKevin Hilman <khilman@deeprootsystems.com>2010-09-24 18:40:24 +0400
commitb39639b820ca64e55c39b5217773919ca7973cec (patch)
tree53b2eba184359e1aa748e40891b3fd4149228697 /arch/arm/mach-davinci/clock.h
parent0a477f6b8c1849701981f6e00e7afcd35af75546 (diff)
downloadlinux-b39639b820ca64e55c39b5217773919ca7973cec.tar.xz
davinci: clock: add support for setting sysclk rate
Setting sysclk rate will be useful in cases where the sysclk is not at a fixed ratio to the PLL output but can asynchronously be changed. This support forms the basis of attempt to keep the AEMIF clock constant on OMAP-L138 even as PLL0 output changes as ARM clock is changed to save power. This patch has been tested on OMAP-L138. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/clock.h')
-rw-r--r--arch/arm/mach-davinci/clock.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 01e36483ac3d..11099980b58b 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -70,6 +70,9 @@
#include <linux/list.h>
#include <asm/clkdev.h>
+#define PLLSTAT_GOSTAT BIT(0)
+#define PLLCMD_GOSET BIT(0)
+
struct pll_data {
u32 phys_base;
void __iomem *base;
@@ -86,6 +89,7 @@ struct clk {
struct module *owner;
const char *name;
unsigned long rate;
+ unsigned long maxrate; /* H/W supported max rate */
u8 usecount;
u8 lpsc;
u8 gpsc;
@@ -118,6 +122,7 @@ struct clk {
int davinci_clk_init(struct clk_lookup *clocks);
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
+int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
extern struct platform_device davinci_wdt_device;
extern void davinci_watchdog_reset(struct platform_device *);