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authorArnd Bergmann <arnd@arndb.de>2017-02-16 19:15:39 +0300
committerArnd Bergmann <arnd@arndb.de>2017-02-16 19:15:39 +0300
commitaf1d09eefa72089300ddde13bbaf9af1a82c6be1 (patch)
tree001a2680400ab2ae8cfb99b72c0dfa41c0e79f25 /arch/arm/mach-davinci/da850.c
parentc6057e101a2d09d24d84a3d2d701fd5e71f5e26a (diff)
parenta3035886852cd859e371550fe726da08b85c67d0 (diff)
downloadlinux-af1d09eefa72089300ddde13bbaf9af1a82c6be1.tar.xz
Merge tag 'davinci-for-v4.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Pull "SoC updates needed for SATA support on DA850" from Sekhar Nori: This includes a merge of non-critical-fixes branch already queued for v4.11 because SATA clock addition conflicts with the fix-up done earlier. * tag 'davinci-for-v4.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: remove BUG_ON() from da850_register_sata() ARM: davinci: da850: model the SATA refclk ARM: davinci: da850: add con_id for the SATA clock ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for SATA ARM: davinci: add skeleton for pdata-quirks bus: da850-mstpri: fix my e-mail address ARM: davinci: da850: fix da850_set_pll0rate() ARM: davinci: da850: coding style fix
Diffstat (limited to 'arch/arm/mach-davinci/da850.c')
-rw-r--r--arch/arm/mach-davinci/da850.c24
1 files changed, 19 insertions, 5 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1d873d15b545..d09765ba246b 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -571,7 +571,7 @@ static struct clk_lookup da850_clks[] = {
CLK("spi_davinci.0", NULL, &spi0_clk),
CLK("spi_davinci.1", NULL, &spi1_clk),
CLK("vpif", NULL, &vpif_clk),
- CLK("ahci_da850", NULL, &sata_clk),
+ CLK("ahci_da850", "fck", &sata_clk),
CLK("davinci-rproc.0", NULL, &dsp_clk),
CLK(NULL, NULL, &ehrpwm_clk),
CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
@@ -1202,14 +1202,28 @@ static int da850_set_armrate(struct clk *clk, unsigned long index)
return clk_set_rate(pllclk, index);
}
-static int da850_set_pll0rate(struct clk *clk, unsigned long index)
+static int da850_set_pll0rate(struct clk *clk, unsigned long rate)
{
- unsigned int prediv, mult, postdiv;
- struct da850_opp *opp;
struct pll_data *pll = clk->pll_data;
+ struct cpufreq_frequency_table *freq;
+ unsigned int prediv, mult, postdiv;
+ struct da850_opp *opp = NULL;
int ret;
- opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
+ rate /= 1000;
+
+ for (freq = da850_freq_table;
+ freq->frequency != CPUFREQ_TABLE_END; freq++) {
+ /* rate is in Hz, freq->frequency is in KHz */
+ if (freq->frequency == rate) {
+ opp = (struct da850_opp *)freq->driver_data;
+ break;
+ }
+ }
+
+ if (!opp)
+ return -EINVAL;
+
prediv = opp->prediv;
mult = opp->mult;
postdiv = opp->postdiv;