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authorLinus Torvalds <torvalds@linux-foundation.org>2018-10-30 01:37:33 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2018-10-30 01:37:33 +0300
commit4b42745211af552f170f38a1b97f4a112b5da6b2 (patch)
tree83b165e30cc685ba335d3295deb193dd910c7271 /arch/arm/mach-imx
parentb22b6beae6116e3a9c46ced312c626f6737a3fa6 (diff)
parentf4f9554f16d0a14b8ced9b3b91bd4e545fca5d66 (diff)
downloadlinux-4b42745211af552f170f38a1b97f4a112b5da6b2.tar.xz
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "A couple of platforms change hands in the MAINTAINERS file: - Linus Walleij lists himself for the ARM Reference platforms: versatile, vexpress, integrator and realview. He has been the main contributor for these for a while, and makes it official now. - Vladimir Zapolskiy takes over the LPC18xx platform from Joachim Eastwood - Manivannan Sadhasivam becomes a secondary maintainer for the Actions Semi machines - Nicolas Ferre lists updates the MAINTAINER listing for the AT91 platform: Ludovic Desroches is now a co-maintainer for the platform, and several other people (Claudiu Beznea, Cristian Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual device drivers. Thanks everyone for working on this, and welcome to the new maintainers! The "virt" platform on qemy or kvm can now be used in big-endian mode without additional tricks, thanks to Jason Donenfeld. Once again, we gain support for another NXP i.MX6 variant, this time it's the i.MX 6ULZ 32-bit single-core version. On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0) and RZ/G2M (r8a774a1). These are described as microcontrollers on the manufacturer website, but appear to be rather powerful. The RZ/G2M is used on the reference board for the CIP Super Long Term Support (SLTS) Linux Kernels" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture arm64: exynos: Enable generic power domain support MAINTAINERS: remove non-exsiting email address of Baoyou MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section MAINTAINERS: Drop dt-bindings/genpd/k2g.h ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms arm64: actions: Enable PINCTRL in platforms Kconfig MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs ARM: imx: add i.mx6ulz msl support ARM: Assume maintainership of ARM reference designs ARM: support big-endian for the virt architecture MAINTAINERS: sdhci: move the Microchip entry to proper location MAINTAINERS: move former ATMEL entries to proper MICROCHIP location MAINTAINERS: remove the / ATMEL string from MICROCHIP entries MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver MAINTAINERS: pwm: add entry for Microchip pwm driver MAINTAINERS: dmaengine: add files to Microchip dma entry MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver ...
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/anatop.c20
-rw-r--r--arch/arm/mach-imx/cpu.c3
-rw-r--r--arch/arm/mach-imx/mmdc.c14
-rw-r--r--arch/arm/mach-imx/mxc.h7
-rw-r--r--arch/arm/mach-imx/pm-imx6.c29
5 files changed, 71 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c
index 61f3d94f1633..45d618abf26b 100644
--- a/arch/arm/mach-imx/anatop.c
+++ b/arch/arm/mach-imx/anatop.c
@@ -31,6 +31,8 @@
#define ANADIG_DIGPROG_IMX6SL 0x280
#define ANADIG_DIGPROG_IMX7D 0x800
+#define SRC_SBMR2 0x1c
+
#define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000
#define BM_ANADIG_REG_2P5_ENABLE_PULLDOWN 0x8
#define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000
@@ -148,6 +150,24 @@ void __init imx_init_revision_from_anatop(void)
major_part = (digprog >> 8) & 0xf;
minor_part = digprog & 0xf;
revision = ((major_part + 1) << 4) | minor_part;
+
+ if ((digprog >> 16) == MXC_CPU_IMX6ULL) {
+ void __iomem *src_base;
+ u32 sbmr2;
+
+ np = of_find_compatible_node(NULL, NULL,
+ "fsl,imx6ul-src");
+ src_base = of_iomap(np, 0);
+ WARN_ON(!src_base);
+ sbmr2 = readl_relaxed(src_base + SRC_SBMR2);
+ iounmap(src_base);
+
+ /* src_sbmr2 bit 6 is to identify if it is i.MX6ULZ */
+ if (sbmr2 & (1 << 6)) {
+ digprog &= ~(0xff << 16);
+ digprog |= (MXC_CPU_IMX6ULZ << 16);
+ }
+ }
}
mxc_set_cpu_type(digprog >> 16 & 0xff);
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index c6b1bf97a6c1..c73593e09121 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -136,6 +136,9 @@ struct device * __init imx_soc_device_init(void)
case MXC_CPU_IMX6ULL:
soc_id = "i.MX6ULL";
break;
+ case MXC_CPU_IMX6ULZ:
+ soc_id = "i.MX6ULZ";
+ break;
case MXC_CPU_IMX6SLL:
soc_id = "i.MX6SLL";
break;
diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c
index 04b3bf71de94..e49e06834516 100644
--- a/arch/arm/mach-imx/mmdc.c
+++ b/arch/arm/mach-imx/mmdc.c
@@ -11,6 +11,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
+#include <linux/clk.h>
#include <linux/hrtimer.h>
#include <linux/init.h>
#include <linux/interrupt.h>
@@ -546,7 +547,20 @@ static int imx_mmdc_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
void __iomem *mmdc_base, *reg;
+ struct clk *mmdc_ipg_clk;
u32 val;
+ int err;
+
+ /* the ipg clock is optional */
+ mmdc_ipg_clk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(mmdc_ipg_clk))
+ mmdc_ipg_clk = NULL;
+
+ err = clk_prepare_enable(mmdc_ipg_clk);
+ if (err) {
+ dev_err(&pdev->dev, "Unable to enable mmdc ipg clock.\n");
+ return err;
+ }
mmdc_base = of_iomap(np, 0);
WARN_ON(!mmdc_base);
diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h
index 026e2ca45f1e..b130a53ff62a 100644
--- a/arch/arm/mach-imx/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
@@ -40,6 +40,8 @@
#define MXC_CPU_IMX6Q 0x63
#define MXC_CPU_IMX6UL 0x64
#define MXC_CPU_IMX6ULL 0x65
+/* virtual cpu id for i.mx6ulz */
+#define MXC_CPU_IMX6ULZ 0x6b
#define MXC_CPU_IMX6SLL 0x67
#define MXC_CPU_IMX7D 0x72
@@ -80,6 +82,11 @@ static inline bool cpu_is_imx6ull(void)
return __mxc_cpu_type == MXC_CPU_IMX6ULL;
}
+static inline bool cpu_is_imx6ulz(void)
+{
+ return __mxc_cpu_type == MXC_CPU_IMX6ULZ;
+}
+
static inline bool cpu_is_imx6sll(void)
{
return __mxc_cpu_type == MXC_CPU_IMX6SLL;
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index b08e407d8d96..87f45b926c78 100644
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -313,7 +313,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
if (cpu_is_imx6sl())
val |= BM_CLPCR_BYPASS_PMIC_READY;
if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() ||
- cpu_is_imx6ull() || cpu_is_imx6sll())
+ cpu_is_imx6ull() || cpu_is_imx6sll() || cpu_is_imx6ulz())
val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
else
val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
@@ -331,7 +331,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
if (cpu_is_imx6sl() || cpu_is_imx6sx())
val |= BM_CLPCR_BYPASS_PMIC_READY;
if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul() ||
- cpu_is_imx6ull() || cpu_is_imx6sll())
+ cpu_is_imx6ull() || cpu_is_imx6sll() || cpu_is_imx6ulz())
val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
else
val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
@@ -618,6 +618,28 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata
IMX6Q_GPR1_GINT);
}
+static void imx6_pm_stby_poweroff(void)
+{
+ imx6_set_lpm(STOP_POWER_OFF);
+ imx6q_suspend_finish(0);
+
+ mdelay(1000);
+
+ pr_emerg("Unable to poweroff system\n");
+}
+
+static int imx6_pm_stby_poweroff_probe(void)
+{
+ if (pm_power_off) {
+ pr_warn("%s: pm_power_off already claimed %p %pf!\n",
+ __func__, pm_power_off, pm_power_off);
+ return -EBUSY;
+ }
+
+ pm_power_off = imx6_pm_stby_poweroff;
+ return 0;
+}
+
void __init imx6_pm_ccm_init(const char *ccm_compat)
{
struct device_node *np;
@@ -634,6 +656,9 @@ void __init imx6_pm_ccm_init(const char *ccm_compat)
val = readl_relaxed(ccm_base + CLPCR);
val &= ~BM_CLPCR_LPM;
writel_relaxed(val, ccm_base + CLPCR);
+
+ if (of_property_read_bool(np, "fsl,pmic-stby-poweroff"))
+ imx6_pm_stby_poweroff_probe();
}
void __init imx6q_pm_init(void)