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authorFabio Estevam <festevam@denx.de>2023-07-26 02:26:28 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-08-23 18:52:37 +0300
commit6777c4379bd813613e118fdd07f7a2c2e0d9069f (patch)
treeb5d055ad1078db188266ed2f0582a45bda74bdf3 /arch/arm/mach-ixp4xx
parentca69bb14538366f3c86669cc40f8f2aff0993d6f (diff)
downloadlinux-6777c4379bd813613e118fdd07f7a2c2e0d9069f.tar.xz
arm64: dts: imx8mm: Drop CSI1 PHY reference clock configuration
[ Upstream commit f02b53375e8f14b4c27a14f6e4fb6e89914fdc29 ] The CSI1 PHY reference clock is limited to 125 MHz according to: i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 Table 5-1. Clock Root Table (continued) / page 307 Slice Index n = 123 . Currently the IMX8MM_CLK_CSI1_PHY_REF clock is configured to be fed directly from 1 GHz PLL2 , which overclocks them. Instead, drop the configuration altogether, which defaults the clock to 24 MHz REF clock input, which for the PHY reference clock is just fine. Based on a patch from Marek Vasut for the imx8mn. Fixes: e523b7c54c05 ("arm64: dts: imx8mm: Add CSI nodes") Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Reviewed-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/mach-ixp4xx')
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