diff options
author | Lubomir Rintel <lkundrak@v3.sk> | 2019-06-27 00:42:19 +0300 |
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committer | Lubomir Rintel <lkundrak@v3.sk> | 2019-10-17 17:36:11 +0300 |
commit | d093bc0378f5e3542bfbbae0c0533ae68e260013 (patch) | |
tree | 6cd1cca8535ce9e73c3fae35d75aceee54a04346 /arch/arm/mach-mmp/platsmp.c | |
parent | a9372a5fb20597a070d89f9402241d9012c0590f (diff) | |
download | linux-d093bc0378f5e3542bfbbae0c0533ae68e260013.tar.xz |
ARM: mmp: add SMP support
Used to bring up the second core on MMP3.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Diffstat (limited to 'arch/arm/mach-mmp/platsmp.c')
-rw-r--r-- | arch/arm/mach-mmp/platsmp.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/platsmp.c b/arch/arm/mach-mmp/platsmp.c new file mode 100644 index 000000000000..c99405469bb4 --- /dev/null +++ b/arch/arm/mach-mmp/platsmp.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Lubomir Rintel <lkundrak@v3.sk> + */ +#include <linux/io.h> +#include <asm/smp_scu.h> +#include <asm/smp.h> +#include "addr-map.h" + +#define SW_BRANCH_VIRT_ADDR CIU_REG(0x24) + +static int mmp3_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + /* + * Apparently, the boot ROM on the second core spins on this + * register becoming non-zero and then jumps to the address written + * there. No IPIs involved. + */ + __raw_writel(__pa_symbol(secondary_startup), SW_BRANCH_VIRT_ADDR); + return 0; +} + +static void mmp3_smp_prepare_cpus(unsigned int max_cpus) +{ + scu_enable(SCU_VIRT_BASE); +} + +static const struct smp_operations mmp3_smp_ops __initconst = { + .smp_prepare_cpus = mmp3_smp_prepare_cpus, + .smp_boot_secondary = mmp3_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(mmp3_smp, "marvell,mmp3-smp", &mmp3_smp_ops); |