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| author | Catalin Marinas <catalin.marinas@arm.com> | 2013-05-08 13:22:07 +0400 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-05-08 13:22:07 +0400 |
| commit | e6b6dc7f35f9bf91b1e4ef14e5112948910b8875 (patch) | |
| tree | df60971e6b7049bc3ca2d1229b89c300fe8cf107 /arch/arm/mach-msm/platsmp.c | |
| parent | 16c85a1fd73eade2ae290d759924c09b4595f504 (diff) | |
| parent | c0114709ed85a5693eb74acdfa03d94f7f12e5b8 (diff) | |
| download | linux-e6b6dc7f35f9bf91b1e4ef14e5112948910b8875.tar.xz | |
Merge branch 'gic' into HEAD
* arm64-prep-gic:
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
irqchip: gic: Call handle_bad_irq() directly
arm: Move chained_irq_(enter|exit) to a generic file
arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
Diffstat (limited to 'arch/arm/mach-msm/platsmp.c')
| -rw-r--r-- | arch/arm/mach-msm/platsmp.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 42932865416a..00cdb0a5dac8 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -15,7 +15,6 @@ #include <linux/jiffies.h> #include <linux/smp.h> #include <linux/io.h> -#include <linux/irqchip/arm-gic.h> #include <asm/cacheflush.h> #include <asm/cputype.h> @@ -42,13 +41,6 @@ static inline int get_core_count(void) static void __cpuinit msm_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ |