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authorSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>2013-07-03 19:01:42 +0400
committerSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>2013-08-21 13:29:52 +0400
commitf6cec7cd0777fa18723fce9d398fa7e53b6ef00c (patch)
treee9ff7df8618585eebb3c7712b671ff21ae535d53 /arch/arm/mach-mvebu/platsmp.c
parent816a8de0017f16c32e747abc5367bf379515b20a (diff)
downloadlinux-f6cec7cd0777fa18723fce9d398fa7e53b6ef00c.tar.xz
ARM: mvebu: remove device tree parsing for cpu nodes
Currently set_secondary_cpus_clock assume the CPU logical ordering and the MPDIR in DT are same, which is incorrect. Since the CPU device nodes can be retrieved in the logical ordering using the DT helper, we can remove the devices tree parsing. This patch removes DT parsing by making use of of_get_cpu_node. Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Diffstat (limited to 'arch/arm/mach-mvebu/platsmp.c')
-rw-r--r--arch/arm/mach-mvebu/platsmp.c51
1 files changed, 23 insertions, 28 deletions
diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
index ce81d3031405..594b63db4215 100644
--- a/arch/arm/mach-mvebu/platsmp.c
+++ b/arch/arm/mach-mvebu/platsmp.c
@@ -29,45 +29,40 @@
#include "pmsu.h"
#include "coherency.h"
+static struct clk *__init get_cpu_clk(int cpu)
+{
+ struct clk *cpu_clk;
+ struct device_node *np = of_get_cpu_node(cpu, NULL);
+
+ if (WARN(!np, "missing cpu node\n"))
+ return NULL;
+ cpu_clk = of_clk_get(np, 0);
+ if (WARN_ON(IS_ERR(cpu_clk)))
+ return NULL;
+ return cpu_clk;
+}
+
void __init set_secondary_cpus_clock(void)
{
- int thiscpu;
+ int thiscpu, cpu;
unsigned long rate;
- struct clk *cpu_clk = NULL;
- struct device_node *np = NULL;
+ struct clk *cpu_clk;
thiscpu = smp_processor_id();
- for_each_node_by_type(np, "cpu") {
- int err;
- int cpu;
-
- err = of_property_read_u32(np, "reg", &cpu);
- if (WARN_ON(err))
- return;
-
- if (cpu == thiscpu) {
- cpu_clk = of_clk_get(np, 0);
- break;
- }
- }
- if (WARN_ON(IS_ERR(cpu_clk)))
+ cpu_clk = get_cpu_clk(thiscpu);
+ if (!cpu_clk)
return;
clk_prepare_enable(cpu_clk);
rate = clk_get_rate(cpu_clk);
/* set all the other CPU clk to the same rate than the boot CPU */
- for_each_node_by_type(np, "cpu") {
- int err;
- int cpu;
-
- err = of_property_read_u32(np, "reg", &cpu);
- if (WARN_ON(err))
+ for_each_possible_cpu(cpu) {
+ if (cpu == thiscpu)
+ continue;
+ cpu_clk = get_cpu_clk(cpu);
+ if (!cpu_clk)
return;
-
- if (cpu != thiscpu) {
- cpu_clk = of_clk_get(np, 0);
- clk_set_rate(cpu_clk, rate);
- }
+ clk_set_rate(cpu_clk, rate);
}
}