summaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap2/cm.h
diff options
context:
space:
mode:
authorPaul Walmsley <paul@pwsan.com>2009-09-03 21:14:02 +0400
committerpaul <paul@twilight.(none)>2009-09-03 21:14:02 +0400
commit71348bcaac6f4c372525d4d62e88a82a7330435b (patch)
treed0815681a02f914a8f24fb4f5050d357ecfbdfb5 /arch/arm/mach-omap2/cm.h
parentc0407a96d04794be586eab4a412320079446cf93 (diff)
downloadlinux-71348bcaac6f4c372525d4d62e88a82a7330435b.tar.xz
OMAP2/3/4 PRCM: add module IDLEST wait code
After a hardware module's clocks are enabled, Linux must wait for it to indicate readiness via its IDLEST bit before attempting to access the device, otherwise register accesses to the device may trigger an abort. This has traditionally been implemented in the clock framework, but this is the wrong place for it: the clock framework doesn't know which module clocks must be enabled for a module to leave idle; and if a module is not in smart-idle mode, it may never leave idle at all. This type of information is best stored in a per-hardware module data structure (coming in a following patch), rather than a per-clock data structure. The new code will use these new functions to handle waiting for modules to enable. Once hardware module data is filled in for all of the on-chip devices, the clock framework code to handle IDLEST waiting can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm.h')
-rw-r--r--arch/arm/mach-omap2/cm.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 18d9a121aa7a..cfd0b726ba44 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -98,6 +98,10 @@ extern u32 cm_read_mod_reg(s16 module, u16 idx);
extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);
extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
+extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
+ u8 idlest_shift);
+extern int omap4_cm_wait_module_ready(u32 prcm_mod, u8 prcm_dev_offs);
+
static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
return cm_rmw_mod_reg_bits(bits, bits, module, idx);