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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-05 05:47:11 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-05 05:47:11 +0300 |
commit | 694b5a5d313f3997764b67d52bab66ec7e59e714 (patch) | |
tree | 9805ee9750144aa7dec19492ee5af6f3cc5362fe /arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |
parent | 587f17018a2c6c414e41a312b002faaef60cf423 (diff) | |
parent | d2353bad2c1eef7a1228645fbb21e7887c633d12 (diff) | |
download | linux-694b5a5d313f3997764b67d52bab66ec7e59e714.tar.xz |
Merge tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"One new platform gets added, the Realtek RTD1195, which is an older
Cortex-a7 based relative of the RTD12xx chips that are already
supported in arch/arm64. The platform may also be extended to support
running 32-bit kernels on those 64-bit chips for memory-constrained
machines.
In the Renesas shmobile platform, we gain support for "RZ/G1H" or
R8A7742, an eight-core chip based on Cortex-A15 and Cortex-A7 cores,
originally released in 2016 as one of the last high-end 32-bit
designs.
There is ongoing cleanup for the integrator, tegra, imx, and omap2
platforms, with integrator getting very close to the goal of having
zero code in arch/arm/, and omap2 moving more of the chip specifics
from old board code into device tree files.
The Versatile Express platform is made more modular, with built-in
drivers now becoming loadable modules. This is part of a greater
effort for the Android OS to have a common kernel binary for all
platforms and any platform specific code in loadable modules.
The PXA platform drops support for Compulab's pxa2xx boards that had
rather unusual flash and PCI drivers but no known users remaining. All
device drivers specific to those boards can now get removed as well.
Across platforms, there is ongoing cleanup, with Geert and Rob
revisiting some a lot of Kconfig options"
* tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits)
ARM: omap2: fix omap5_realtime_timer_init definition
ARM: zynq: Don't select CONFIG_ICST
ARM: OMAP2+: Fix regression for using local timer on non-SMP SoCs
clk: versatile: Fix kconfig dependency on COMMON_CLK_VERSATILE
ARM: davinci: fix build failure without I2C
power: reset: vexpress: fix build issue
power: vexpress: cleanup: use builtin_platform_driver
power: vexpress: add suppress_bind_attrs to true
Revert "ARM: vexpress: Don't select VEXPRESS_CONFIG"
MAINTAINERS: pxa: remove Compulab arm/pxa support
ARM: pxa: remove Compulab pxa2xx boards
bus: arm-integrator-lm: Fix return value check in integrator_ap_lm_probe()
soc: imx: move cpu code to drivers/soc/imx
ARM: imx: move cpu definitions into a header
ARM: imx: use device_initcall for imx_soc_device_init
ARM: imx: pcm037: make pcm970_sja1000_platform_data static
bus: ti-sysc: Timers no longer need legacy quirk handling
ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter
ARM: dts: Configure system timers for omap2
ARM: dts: Configure system timers for ti81xx
...
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_3xxx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 146 |
1 files changed, 1 insertions, 145 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 3c8d2b6e887a..ca02f91237e3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -147,36 +147,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { .sysc = &omap3xxx_timer_sysc, }; -/* timer1 */ -static struct omap_hwmod omap3xxx_timer1_hwmod = { - .name = "timer1", - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - -/* timer2 */ -static struct omap_hwmod omap3xxx_timer2_hwmod = { - .name = "timer2", - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { - .module_offs = OMAP3430_PER_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* timer3 */ static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", @@ -312,21 +282,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { .flags = HWMOD_SET_DEFAULT_CLOCKACT, }; -/* timer12 */ -static struct omap_hwmod omap3xxx_timer12_hwmod = { - .name = "timer12", - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on @@ -1525,38 +1480,6 @@ static struct omap_hwmod omap3xxx_sad2d_hwmod = { }; /* - * '32K sync counter' class - * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock - */ -static struct omap_hwmod_class_sysconfig omap3xxx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0004, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_counter_hwmod_class = { - .name = "counter", - .sysc = &omap3xxx_counter_sysc, -}; - -static struct omap_hwmod omap3xxx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap3xxx_counter_hwmod_class, - .clkdm_name = "wkup_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "wkup_32k_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_32KSYNC_SHIFT, - }, - }, -}; - -/* * 'gpmc' class * general purpose memory controller */ @@ -1868,25 +1791,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l3__iva = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; - -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_timer1_hwmod, - .clk = "gpt1_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - - -/* l4_per -> timer2 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_timer2_hwmod, - .clk = "gpt2_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - - /* l4_per -> timer3 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { .master = &omap3xxx_l4_per_hwmod, @@ -1965,15 +1869,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; - -/* l4_core -> timer12 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_sec__timer12 = { - .master = &omap3xxx_l4_sec_hwmod, - .slave = &omap3xxx_timer12_hwmod, - .clk = "gpt12_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { @@ -2325,16 +2220,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__hdq1w = { .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; -/* l4_wkup -> 32ksync_counter */ - - -static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_counter_32k_hwmod, - .clk = "omap_32ksync_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* am35xx has Davinci MDIO & EMAC */ static struct omap_hwmod_class am35xx_mdio_class = { .name = "davinci_mdio", @@ -2551,8 +2436,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap3_l4_core__i2c2, &omap3_l4_core__i2c3, &omap3xxx_l4_wkup__l4_sec, - &omap3xxx_l4_wkup__timer1, - &omap3xxx_l4_per__timer2, &omap3xxx_l4_per__timer3, &omap3xxx_l4_per__timer4, &omap3xxx_l4_per__timer5, @@ -2580,27 +2463,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap34xx_l4_core__mcspi2, &omap34xx_l4_core__mcspi3, &omap34xx_l4_core__mcspi4, - &omap3xxx_l4_wkup__counter_32k, &omap3xxx_l3_main__gpmc, NULL, }; -/* GP-only hwmod links */ -static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - -static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - -static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - /* crypto hwmod links */ static struct omap_hwmod_ocp_if *omap34xx_sham_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__sham, @@ -2774,7 +2640,7 @@ static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus, int __init omap3xxx_hwmod_init(void) { int r; - struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL, **h_sham = NULL; + struct omap_hwmod_ocp_if **h = NULL, **h_sham = NULL; struct omap_hwmod_ocp_if **h_aes = NULL; struct device_node *bus; unsigned int rev; @@ -2797,18 +2663,15 @@ int __init omap3xxx_hwmod_init(void) rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { h = omap34xx_hwmod_ocp_ifs; - h_gp = omap34xx_gp_hwmod_ocp_ifs; h_sham = omap34xx_sham_hwmod_ocp_ifs; h_aes = omap34xx_aes_hwmod_ocp_ifs; } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { h = am35xx_hwmod_ocp_ifs; - h_gp = am35xx_gp_hwmod_ocp_ifs; h_sham = am35xx_sham_hwmod_ocp_ifs; h_aes = am35xx_aes_hwmod_ocp_ifs; } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2) { h = omap36xx_hwmod_ocp_ifs; - h_gp = omap36xx_gp_hwmod_ocp_ifs; h_sham = omap36xx_sham_hwmod_ocp_ifs; h_aes = omap36xx_aes_hwmod_ocp_ifs; } else { @@ -2820,13 +2683,6 @@ int __init omap3xxx_hwmod_init(void) if (r < 0) return r; - /* Register GP-only hwmod links. */ - if (h_gp && omap_type() == OMAP2_DEVICE_TYPE_GP) { - r = omap_hwmod_register_links(h_gp); - if (r < 0) - return r; - } - /* * Register crypto hwmod links only if they are not disabled in DT. * If DT information is missing, enable them only for GP devices. |