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| author | Rajendra Nayak <rnayak@ti.com> | 2013-05-27 14:16:44 +0400 |
|---|---|---|
| committer | Nishanth Menon <nm@ti.com> | 2014-09-08 20:38:43 +0400 |
| commit | 6099dd37c66931085557363b4716483f97cf92a0 (patch) | |
| tree | a8d887251abfc3a3ed4803ba907936985d62a540 /arch/arm/mach-omap2/pm.h | |
| parent | e97c4eb342055b24da886b56377dc0093e835b4a (diff) | |
| download | linux-6099dd37c66931085557363b4716483f97cf92a0.tar.xz | |
ARM: OMAP5 / DRA7: Enable CPU RET on suspend
On OMAP5 / DRA7, prevent a CPU powerdomain OFF and resulting MPU OSWR
and instead attempt a CPU RET and side effect, MPU RET in suspend.
NOTE: the hardware was originally designed to be capable of achieving
deep power states such as OFF and OSWR, however due to various issues
and risks, deepest valid state was determined to be CSWR - hence we use
the errata framework to handle this case.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[nm@ti.com: updates]
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-omap2/pm.h')
| -rw-r--r-- | arch/arm/mach-omap2/pm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index e150102d6c06..425bfcd67db6 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -101,6 +101,7 @@ static inline void enable_omap3630_toggle_l2_on_restore(void) { } #endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */ #define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD (1 << 0) +#define PM_OMAP4_CPU_OSWR_DISABLE (1 << 1) #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) extern u16 pm44xx_errata; |