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authorLinus Torvalds <torvalds@linux-foundation.org>2017-07-05 00:34:51 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2017-07-05 00:34:51 +0300
commit8ca302e9c61a1b8852f4bd4def8e7ff59f4c729a (patch)
tree0fe462aa3d2ccb0abaf171a3e5d495518c176276 /arch/arm/mach-omap2/timer.c
parent612341bda6ada2bfb2f606e0ce894fca5b6468d9 (diff)
parent18cfd9429d8a82c49add8f3ca9d366599bfcac45 (diff)
downloadlinux-8ca302e9c61a1b8852f4bd4def8e7ff59f4c729a.tar.xz
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann: "SoC platform changes (arch/arm/mach-*). This merge window, the bulk is for a few platforms: - Andres Färber adds initial support for the Actions Semi S500 (aka 'owl') platform, a close relative of the S900 platform he adds for arm64. - in mach-omap2, we remove more legacy code - Rockchips gains support for the RV1108 SoC designed for camera applications. - For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70) - Minor updates for other platforms, including davinci, s3c64xx, prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits) ARM: owl: smp: Drop bogus holding pen ARM: owl: Drop custom machine ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3 soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating soc: actions: Add Owl SPS dt-bindings: power: Add Owl SPS power domains MAINTAINERS: Update Actions Semi section with SPS ARM: owl: Implement CPU enable-method for S500 MAINTAINERS: Add Actions Semi Owl section ARM: Prepare Actions Semi S500 ARM: socfpga: Increase max number of GPIOs ARM: stm32: Introduce MACH_STM32F469 flag ARM: prima2: remove redundant select CPU_V7 ARM: davinci: fix const warnings ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON ARM: OMAP4: hwmod_data: add SHAM crypto accelerator ARM: OMAP4: hwmod data: add des ARM: OMAP4: hwmod data: add aes2 ARM: OMAP4: hwmod data: add aes1 ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe() ...
Diffstat (limited to 'arch/arm/mach-omap2/timer.c')
-rw-r--r--arch/arm/mach-omap2/timer.c200
1 files changed, 50 insertions, 150 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index ae4bb9fdc483..ece09c9461f7 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -68,6 +68,9 @@
static struct omap_dm_timer clkev;
static struct clock_event_device clockevent_gpt;
+/* Clockevent hwmod for am335x and am437x suspend */
+static struct omap_hwmod *clockevent_gpt_hwmod;
+
#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
static unsigned long arch_timer_freq;
@@ -125,6 +128,23 @@ static int omap2_gp_timer_set_periodic(struct clock_event_device *evt)
return 0;
}
+static void omap_clkevt_idle(struct clock_event_device *unused)
+{
+ if (!clockevent_gpt_hwmod)
+ return;
+
+ omap_hwmod_idle(clockevent_gpt_hwmod);
+}
+
+static void omap_clkevt_unidle(struct clock_event_device *unused)
+{
+ if (!clockevent_gpt_hwmod)
+ return;
+
+ omap_hwmod_enable(clockevent_gpt_hwmod);
+ __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
+}
+
static struct clock_event_device clockevent_gpt = {
.features = CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_ONESHOT,
@@ -232,37 +252,29 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
const char **timer_name,
int posted)
{
- char name[10]; /* 10 = sizeof("gptXX_Xck0") */
const char *oh_name = NULL;
struct device_node *np;
struct omap_hwmod *oh;
- struct resource irq, mem;
struct clk *src;
int r = 0;
- if (of_have_populated_dt()) {
- np = omap_get_timer_dt(omap_timer_match, property);
- if (!np)
- return -ENODEV;
+ np = omap_get_timer_dt(omap_timer_match, property);
+ if (!np)
+ return -ENODEV;
- of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
- if (!oh_name)
- return -ENODEV;
+ of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+ if (!oh_name)
+ return -ENODEV;
- timer->irq = irq_of_parse_and_map(np, 0);
- if (!timer->irq)
- return -ENXIO;
+ timer->irq = irq_of_parse_and_map(np, 0);
+ if (!timer->irq)
+ return -ENXIO;
- timer->io_base = of_iomap(np, 0);
+ timer->io_base = of_iomap(np, 0);
- of_node_put(np);
- } else {
- if (omap_dm_timer_reserve_systimer(timer->id))
- return -ENODEV;
+ timer->fclk = of_clk_get_by_name(np, "fck");
- sprintf(name, "timer%d", timer->id);
- oh_name = name;
- }
+ of_node_put(np);
oh = omap_hwmod_lookup(oh_name);
if (!oh)
@@ -270,29 +282,14 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
*timer_name = oh->name;
- if (!of_have_populated_dt()) {
- r = omap_hwmod_get_resource_byname(oh, IORESOURCE_IRQ, NULL,
- &irq);
- if (r)
- return -ENXIO;
- timer->irq = irq.start;
-
- r = omap_hwmod_get_resource_byname(oh, IORESOURCE_MEM, NULL,
- &mem);
- if (r)
- return -ENXIO;
-
- /* Static mapping, never released */
- timer->io_base = ioremap(mem.start, mem.end - mem.start);
- }
-
if (!timer->io_base)
return -ENXIO;
omap_hwmod_setup_one(oh_name);
/* After the dmtimer is using hwmod these clocks won't be needed */
- timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
+ if (IS_ERR_OR_NULL(timer->fclk))
+ timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
if (IS_ERR(timer->fclk))
return PTR_ERR(timer->fclk);
@@ -358,6 +355,14 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
3, /* Timer internal resynch latency */
0xffffffff);
+ if (soc_is_am33xx() || soc_is_am43xx()) {
+ clockevent_gpt.suspend = omap_clkevt_idle;
+ clockevent_gpt.resume = omap_clkevt_unidle;
+
+ clockevent_gpt_hwmod =
+ omap_hwmod_lookup(clockevent_gpt.name);
+ }
+
pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name,
clkev.rate);
}
@@ -405,18 +410,15 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
const char *oh_name = "counter_32k";
/*
- * If device-tree is present, then search the DT blob
- * to see if the 32kHz counter is supported.
+ * See if the 32kHz counter is supported.
*/
- if (of_have_populated_dt()) {
- np = omap_get_timer_dt(omap_counter_match, NULL);
- if (!np)
- return -ENODEV;
-
- of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
- if (!oh_name)
- return -ENODEV;
- }
+ np = omap_get_timer_dt(omap_counter_match, NULL);
+ if (!np)
+ return -ENODEV;
+
+ of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
+ if (!oh_name)
+ return -ENODEV;
/*
* First check hwmod data is available for sync32k counter
@@ -434,18 +436,6 @@ static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
return ret;
}
- if (!of_have_populated_dt()) {
- void __iomem *vbase;
-
- vbase = omap_hwmod_get_mpu_rt_va(oh);
-
- ret = omap_init_clocksource_32k(vbase);
- if (ret) {
- pr_warn("%s: failed to initialize counter_32k as a clocksource (%d)\n",
- __func__, ret);
- omap_hwmod_idle(oh);
- }
- }
return ret;
}
@@ -661,96 +651,6 @@ void __init omap5_realtime_timer_init(void)
#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
/**
- * omap_timer_init - build and register timer device with an
- * associated timer hwmod
- * @oh: timer hwmod pointer to be used to build timer device
- * @user: parameter that can be passed from calling hwmod API
- *
- * Called by omap_hwmod_for_each_by_class to register each of the timer
- * devices present in the system. The number of timer devices is known
- * by parsing through the hwmod database for a given class name. At the
- * end of function call memory is allocated for timer device and it is
- * registered to the framework ready to be proved by the driver.
- */
-static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
-{
- int id;
- int ret = 0;
- char *name = "omap_timer";
- struct dmtimer_platform_data *pdata;
- struct platform_device *pdev;
- struct omap_timer_capability_dev_attr *timer_dev_attr;
-
- pr_debug("%s: %s\n", __func__, oh->name);
-
- /* on secure device, do not register secure timer */
- timer_dev_attr = oh->dev_attr;
- if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
- if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
- return ret;
-
- pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
- if (!pdata) {
- pr_err("%s: No memory for [%s]\n", __func__, oh->name);
- return -ENOMEM;
- }
-
- /*
- * Extract the IDs from name field in hwmod database
- * and use the same for constructing ids' for the
- * timer devices. In a way, we are avoiding usage of
- * static variable witin the function to do the same.
- * CAUTION: We have to be careful and make sure the
- * name in hwmod database does not change in which case
- * we might either make corresponding change here or
- * switch back static variable mechanism.
- */
- sscanf(oh->name, "timer%2d", &id);
-
- if (timer_dev_attr)
- pdata->timer_capability = timer_dev_attr->timer_capability;
-
- pdata->timer_errata = omap_dm_timer_get_errata();
- pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
-
- pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata));
-
- if (IS_ERR(pdev)) {
- pr_err("%s: Can't build omap_device for %s: %s.\n",
- __func__, name, oh->name);
- ret = -EINVAL;
- }
-
- kfree(pdata);
-
- return ret;
-}
-
-/**
- * omap2_dm_timer_init - top level regular device initialization
- *
- * Uses dedicated hwmod api to parse through hwmod database for
- * given class name and then build and register the timer device.
- */
-static int __init omap2_dm_timer_init(void)
-{
- int ret;
-
- /* If dtb is there, the devices will be created dynamically */
- if (of_have_populated_dt())
- return -ENODEV;
-
- ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
- if (unlikely(ret)) {
- pr_err("%s: device registration failed.\n", __func__);
- return -EINVAL;
- }
-
- return 0;
-}
-omap_arch_initcall(omap2_dm_timer_init);
-
-/**
* omap2_override_clocksource - clocksource override with user configuration
*
* Allows user to override default clocksource, using kernel parameter