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authorMagnus Damm <damm@opensource.se>2010-12-28 11:27:01 +0300
committerPaul Mundt <lethal@linux-sh.org>2011-01-07 04:42:50 +0300
commit863b171952dba1a3ce9d345cfe4e93c9fdd42f49 (patch)
tree8181acaff12a0040ca6e86cfec380f54e4a2fd51 /arch/arm/mach-shmobile/entry-intc.S
parent60f1435c3bab8b88712a4f96806e5ac9396aa49c (diff)
downloadlinux-863b171952dba1a3ce9d345cfe4e93c9fdd42f49.tar.xz
ARM: mach-shmobile: Run-time IRQ handler for INTCA
Break-out INTC specific IRQ demux code from the file entry-macro-intc.S and register during run-time. Covers sh7367, sh7377 and sh7372. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/mach-shmobile/entry-intc.S')
-rw-r--r--arch/arm/mach-shmobile/entry-intc.S57
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/entry-intc.S b/arch/arm/mach-shmobile/entry-intc.S
new file mode 100644
index 000000000000..cac0a7ae2084
--- /dev/null
+++ b/arch/arm/mach-shmobile/entry-intc.S
@@ -0,0 +1,57 @@
+/*
+ * ARM Interrupt demux handler using INTC
+ *
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <asm/entry-macro-multi.S>
+
+#define INTCA_BASE 0xe6980000
+#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
+#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
+#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
+#define INTLVLB_OFFS 0x00000034 /* previous priority level */
+
+ .macro get_irqnr_preamble, base, tmp
+ ldr \base, =INTCA_BASE
+ .endm
+
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ /* The single INTFLGA read access below results in the following:
+ *
+ * 1. INTLVLB is updated with old priority value from INTLVLA
+ * 2. Highest priority interrupt is accepted
+ * 3. INTLVLA is updated to contain priority of accepted interrupt
+ * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
+ */
+ ldr \irqnr, [\base, #INTFLGA_OFFS]
+
+ /* Restore INTLVLA with the value saved in INTLVLB.
+ * This is required to support interrupt priorities properly.
+ */
+ ldrb \tmp, [\base, #INTLVLB_OFFS]
+ strb \tmp, [\base, #INTLVLA_OFFS]
+
+ /* Handle invalid vector number case */
+ cmp \irqnr, #0
+ beq 1000f
+
+ /* Convert vector to irq number, same as the evt2irq() macro */
+ lsr \irqnr, \irqnr, #0x5
+ subs \irqnr, \irqnr, #16
+
+1000:
+ .endm
+
+ .macro test_for_ipi, irqnr, irqstat, base, tmp
+ .endm
+
+ .macro test_for_ltirq, irqnr, irqstat, base, tmp
+ .endm
+
+ arch_irq_handler shmobile_handle_irq_intc