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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-03-19 16:47:58 +0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-05-30 03:50:21 +0400
commitc59917f877ae9b94d4ba146600c763ed6ae97a1b (patch)
treec5654621bc0902d86907100832ab6dc1d2b9ea56 /arch/arm/mach-ux500
parentc4a202c8ae001e7154a5fe22b64f751d37da2122 (diff)
downloadlinux-c59917f877ae9b94d4ba146600c763ed6ae97a1b.tar.xz
ARM: l2c: ux500: don't try to change the L2 cache auxiliary control register
ux500 can't change the auxiliary control register, so there's no point passing values to try and modify it to the l2x0 init functions. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r--arch/arm/mach-ux500/cache-l2x0.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index 5b891d051054..842ebedbdd1c 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -57,9 +57,9 @@ static int __init ux500_l2x0_init(void)
outer_cache.write_sec = ux500_l2c310_write_sec;
if (of_have_populated_dt())
- l2x0_of_init(0x3e000000, 0xc00f0fff);
+ l2x0_of_init(0, ~0);
else
- l2x0_init(l2x0_base, 0x3e000000, 0xc00f0fff);
+ l2x0_init(l2x0_base, 0, ~0);
return 0;
}