diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2023-02-28 14:41:12 +0300 |
|---|---|---|
| committer | Jernej Skrabec <jernej.skrabec@gmail.com> | 2023-03-14 23:36:57 +0300 |
| commit | 23ca1dd442249727abed6ac523b37d737ea5bdc0 (patch) | |
| tree | 4f0ac56c72b364821c2cbed4b9d1c0d4c9cdb7f0 /arch/arm64/boot/dts/allwinner | |
| parent | 9ebdff9aac5ded7bb515e80478afacaaa3abd799 (diff) | |
| download | linux-23ca1dd442249727abed6ac523b37d737ea5bdc0.tar.xz | |
arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS
So far the OrangePi PC2 board was running at a fixed frequency, set by
U-Boot to 816 MHz, which is the best achievable frequency at the 1.1V
CPU voltage provided by the PMIC at reset.
We already describe the CPU voltage regulator in the DT, but were
missing the OPP table. Just include the default H5 OPP table, as used
by other boards. My OrangePi PC2 runs just fine with those values, and
now goes up to 1.15 GHz.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20230228114112.3340715-1-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts index b5c1ff19b4c4..ce3ae19e72db 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts @@ -3,6 +3,7 @@ /dts-v1/; #include "sun50i-h5.dtsi" +#include "sun50i-h5-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> |