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author | Arnd Bergmann <arnd@arndb.de> | 2024-04-29 19:12:53 +0300 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2024-04-29 19:12:53 +0300 |
commit | 631ec374839895f8830eb07e0615b778d1908faf (patch) | |
tree | 0229932f3bbc874060b38fa1987f9ca8376c93ed /arch/arm64/boot/dts/amazon/alpine-v2.dtsi | |
parent | f71b3cf82e0aa8259ca0e7976686bb2abfd0ec5e (diff) | |
parent | de2ba5bd3607a5e5442a5fcbdea6ee2823b72fb9 (diff) | |
download | linux-631ec374839895f8830eb07e0615b778d1908faf.tar.xz |
Merge tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.10
Fixes, which might have practical impact, however things were broken for
long enough to justify pushing it regular path:
1. ARM Juno: shorten node names for thermal zones, because Linux drivers
have strict limit of 20 characters.
2. HiSilicon: correct size of GIC GICC address space and add missing
GICH and GICV spaces, add cache info to properly describe cache
topology and solve kernel boot warning.
Several cleanups:
1. Use capital "OR" for multiple licenses in SPDX.
2. Correct white-spaces for code readability.
3. Fix W=1 dtc compiler warnings, which should not have practical
impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and
Spreadtrum like:
- missing unit addresses,
- nodes not belonging to soc node,
- not using generic node names,
- few incorrect unit addresses.
* tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: (28 commits)
arm64: dts: cavium: thunder2-99xx: drop redundant reg-names
arm64: dts: amazon: alpine-v3: correct gic unit addresses
arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses
arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses
arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses
arm64: dts: apm: shadowcat: move non-MMIO node out of soc
arm64: dts: apm: storm: move non-MMIO node out of soc
arm64: dts: cavium: correct unit addresses
arm64: dts: cavium: move non-MMIO node out of soc
arm64: dts: realtek: rtc16xx: add missing unit address to soc node
arm64: dts: realtek: rtd139x: add missing unit address to soc node
arm64: dts: realtek: rtd129x: add missing unit address to soc node
arm64: dts: uniphier: ld20-global: drop audio codec port unit address
arm64: dts: uniphier: ld20-global: use generic node name for audio-codec
arm64: dts: uniphier: ld11-global: drop audio codec port unit address
arm64: dts: uniphier: ld11-global: use generic node name for audio-codec
arm64: dts: sharkl3: add missing unit addresses
arm64: dts: whale2: add missing ap-apb unit address
arm64: dts: sc9860: move GIC to soc node
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/amazon/alpine-v2.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/amazon/alpine-v2.dtsi | 35 |
1 files changed, 18 insertions, 17 deletions
diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi index dbe21d88a29e..da9de4986660 100644 --- a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi +++ b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi @@ -39,6 +39,7 @@ / { model = "Annapurna Labs Alpine v2"; compatible = "al,alpine-v2"; + interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; @@ -89,6 +90,22 @@ clock-frequency = <1000000>; }; + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + pmu { + compatible = "arm,cortex-a57-pmu"; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -97,22 +114,6 @@ interrupt-parent = <&gic>; ranges; - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, - <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; - }; - - pmu { - compatible = "arm,cortex-a57-pmu"; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - }; - gic: interrupt-controller@f0200000 { compatible = "arm,gic-v3"; reg = <0x0 0xf0200000 0x0 0x10000>, /* GIC Dist */ @@ -150,7 +151,7 @@ al,msi-num-spis = <160>; }; - io-fabric { + io-fabric@fc000000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; |