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authorLiviu Dudau <Liviu.Dudau@arm.com>2014-11-27 17:36:45 +0300
committerArnd Bergmann <arnd@arndb.de>2014-11-29 00:38:14 +0300
commit6bc474de366155c19d69966b45a7c06b8e2a9837 (patch)
treedd7e8c6f0daba4b2a71d8cb81965f162f506ac8f /arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi
parent419043609689d0aba9f727a6faf1ff406e269ecf (diff)
downloadlinux-6bc474de366155c19d69966b45a7c06b8e2a9837.tar.xz
arm64: ARM: Fix the Generic Timers interrupt active level description
The Cortex-A5x TRM states in paragraph "9.2 Generic Timer functional description" that generic timers provide an active-LOW interrupt output. Fix the device trees to correctly describe this. While doing this update the CPU mask to match the number of described CPUs as well. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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