diff options
author | Brad Larson <blarson@amd.com> | 2023-09-25 22:56:10 +0300 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2023-09-28 10:44:51 +0300 |
commit | 34dc1baba215b826e454b8d19e4f24adbeb7d00d (patch) | |
tree | f2957d1a2cf3cc2bcb63b47976223f0eb11c6bc7 /arch/arm64/boot/dts/amd/elba-16core.dtsi | |
parent | b0292fd8be37bb108ff3fd03d20484920d70d2a3 (diff) | |
download | linux-34dc1baba215b826e454b8d19e4f24adbeb7d00d.tar.xz |
arm64: dts: Add AMD Pensando Elba SoC support
Add AMD Pensando common and Elba SoC specific device nodes
Signed-off-by: Brad Larson <blarson@amd.com>
Link: https://lore.kernel.org/r/20230925195610.47971-5-blarson@amd.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/amd/elba-16core.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/amd/elba-16core.dtsi | 197 |
1 files changed, 197 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amd/elba-16core.dtsi b/arch/arm64/boot/dts/amd/elba-16core.dtsi new file mode 100644 index 000000000000..568bcc39ce9f --- /dev/null +++ b/arch/arm64/boot/dts/amd/elba-16core.dtsi @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +/* + * Copyright 2020-2023 Advanced Micro Devices, Inc. + */ + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; + }; + + cluster1 { + core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; + }; + + cluster2 { + core0 { cpu = <&cpu8>; }; + core1 { cpu = <&cpu9>; }; + core2 { cpu = <&cpu10>; }; + core3 { cpu = <&cpu11>; }; + }; + + cluster3 { + core0 { cpu = <&cpu12>; }; + core1 { cpu = <&cpu13>; }; + core2 { cpu = <&cpu14>; }; + core3 { cpu = <&cpu15>; }; + }; + }; + + /* CLUSTER 0 */ + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x0>; + next-level-cache = <&l2_0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x1>; + next-level-cache = <&l2_0>; + enable-method = "psci"; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x2>; + next-level-cache = <&l2_0>; + enable-method = "psci"; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x3>; + next-level-cache = <&l2_0>; + enable-method = "psci"; + }; + + l2_0: l2-cache0 { + compatible = "cache"; + cache-unified; + cache-level = <2>; + }; + + /* CLUSTER 1 */ + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x100>; + next-level-cache = <&l2_1>; + enable-method = "psci"; + }; + + cpu5: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x101>; + next-level-cache = <&l2_1>; + enable-method = "psci"; + }; + + cpu6: cpu@102 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x102>; + next-level-cache = <&l2_1>; + enable-method = "psci"; + }; + + cpu7: cpu@103 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x103>; + next-level-cache = <&l2_1>; + enable-method = "psci"; + }; + + l2_1: l2-cache1 { + compatible = "cache"; + cache-unified; + cache-level = <2>; + }; + + /* CLUSTER 2 */ + cpu8: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x200>; + next-level-cache = <&l2_2>; + enable-method = "psci"; + }; + + cpu9: cpu@201 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x201>; + next-level-cache = <&l2_2>; + enable-method = "psci"; + }; + + cpu10: cpu@202 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x202>; + next-level-cache = <&l2_2>; + enable-method = "psci"; + }; + + cpu11: cpu@203 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x203>; + next-level-cache = <&l2_2>; + enable-method = "psci"; + }; + + l2_2: l2-cache2 { + compatible = "cache"; + cache-unified; + cache-level = <2>; + }; + + /* CLUSTER 3 */ + cpu12: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x300>; + next-level-cache = <&l2_3>; + enable-method = "psci"; + }; + + cpu13: cpu@301 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x301>; + next-level-cache = <&l2_3>; + enable-method = "psci"; + }; + + cpu14: cpu@302 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x302>; + next-level-cache = <&l2_3>; + enable-method = "psci"; + }; + + cpu15: cpu@303 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x303>; + next-level-cache = <&l2_3>; + enable-method = "psci"; + }; + + l2_3: l2-cache3 { + compatible = "cache"; + cache-unified; + cache-level = <2>; + }; + }; +}; |