summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
diff options
context:
space:
mode:
authorXianwei Zhao <xianwei.zhao@amlogic.com>2024-04-01 13:10:53 +0300
committerNeil Armstrong <neil.armstrong@linaro.org>2024-04-12 16:13:22 +0300
commita654af36fe8b54e360fcf155b785df3aa0eab73e (patch)
tree3472ae6900f0567c482768ade92a4b264245bf35 /arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
parent6ef63301fa37087414342269bc02a2a930e81779 (diff)
downloadlinux-a654af36fe8b54e360fcf155b785df3aa0eab73e.tar.xz
arm64: dts: add support for A5 based Amlogic AV400
Amlogic A5 is an application processor designed for smart audio and IoT applications. Add basic support for the A5 based Amlogic AV400 board, which describes the following components: CPU, GIC, IRQ, Timer and UART. These are capable of booting up into the serial console. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240401-basic_dt-v3-5-cb29ae1c16da@amlogic.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi')
-rw-r--r--arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
new file mode 100644
index 000000000000..43f68a7da2f7
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ */
+
+#include "amlogic-a4-common.dtsi"
+/ {
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ };
+
+ cpu1: cpu@100 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ };
+
+ cpu2: cpu@200 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x200>;
+ enable-method = "psci";
+ };
+
+ cpu3: cpu@300 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a55";
+ reg = <0x0 0x300>;
+ enable-method = "psci";
+ };
+ };
+};