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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-06-24 10:12:47 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-06-24 10:12:47 +0300 |
| commit | 1a4f20cab6411c6e73dd22d28b6595b728cc2829 (patch) | |
| tree | ce9bce3390b2c5e331e69a6071e6764665f961bd /arch/arm64/boot/dts/exynos | |
| parent | 5c4a99cf5d254e12295de5d9077f6594966679f4 (diff) | |
| parent | ced37411d7f597129fecc0c3ca2324f44e33f4c8 (diff) | |
| download | linux-1a4f20cab6411c6e73dd22d28b6595b728cc2829.tar.xz | |
Merge branch 'for-v5.20/exynos7885-emmc-clk' into next/dt64
Diffstat (limited to 'arch/arm64/boot/dts/exynos')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts | 20 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7885.dtsi | 32 |
2 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts index 4cf9aa25f618..5db9a81ac7bb 100644 --- a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts +++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts @@ -60,6 +60,26 @@ }; }; +&mmc_0 { + status = "okay"; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + cap-mmc-highspeed; + non-removable; + mmc-hs400-enhanced-strobe; + card-detect-delay = <200>; + clock-frequency = <800000000>; + bus-width = <8>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <2 4>; + samsung,dw-mshc-hs400-timing = <0 2>; + + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk_fast_slew_rate_3x &sd0_cmd &sd0_rdqs + &sd0_bus1 &sd0_bus4 &sd0_bus8>; +}; + &oscclk { clock-frequency = <26000000>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos7885.dtsi b/arch/arm64/boot/dts/exynos/exynos7885.dtsi index 3170661f5b67..40be504b3078 100644 --- a/arch/arm64/boot/dts/exynos/exynos7885.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7885.dtsi @@ -240,6 +240,25 @@ clock-names = "oscclk"; }; + cmu_fsys: clock-controller@13400000 { + compatible = "samsung,exynos7885-cmu-fsys"; + reg = <0x13400000 0x8000>; + #clock-cells = <1>; + + clocks = <&oscclk>, + <&cmu_top CLK_DOUT_FSYS_BUS>, + <&cmu_top CLK_DOUT_FSYS_MMC_CARD>, + <&cmu_top CLK_DOUT_FSYS_MMC_EMBD>, + <&cmu_top CLK_DOUT_FSYS_MMC_SDIO>, + <&cmu_top CLK_DOUT_FSYS_USB30DRD>; + clock-names = "oscclk", + "dout_fsys_bus", + "dout_fsys_mmc_card", + "dout_fsys_mmc_embd", + "dout_fsys_mmc_sdio", + "dout_fsys_usb30drd"; + }; + pinctrl_alive: pinctrl@11cb0000 { compatible = "samsung,exynos7885-pinctrl"; reg = <0x11cb0000 0x1000>; @@ -274,6 +293,19 @@ reg = <0x11c80000 0x10000>; }; + mmc_0: mmc@13500000 { + compatible = "samsung,exynos7-dw-mshc-smu"; + reg = <0x13500000 0x2000>; + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_fsys CLK_GOUT_MMC_EMBD_ACLK>, + <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>; + clock-names = "biu", "ciu"; + fifo-depth = <0x40>; + status = "disabled"; + }; + serial_0: serial@13800000 { compatible = "samsung,exynos5433-uart"; reg = <0x13800000 0x100>; |