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| author | Chanho Park <chanho61.park@samsung.com> | 2022-07-01 04:52:25 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-07-05 13:34:36 +0300 |
| commit | aae10d2bc56fd5c4e9741b98f220e56ca88bf7ca (patch) | |
| tree | eac9b7f1bcc515ce71e64d3bbf7c3f2ecb6e4344 /arch/arm64/boot/dts/exynos | |
| parent | 358ab0d11d8446a93efc9c79007e8513e8becc30 (diff) | |
| download | linux-aae10d2bc56fd5c4e9741b98f220e56ca88bf7ca.tar.xz | |
arm64: dts: exynosautov9: prepare usi0 changes
Before adding whole USI nodes, this applies the changes of usi0 in
advance. To be the usi0 and serian_0 nodes as SoC default, some
properties should be moved to exynosautov9-sadk.dts.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220701015226.32781-5-chanho61.park@samsung.com
Diffstat (limited to 'arch/arm64/boot/dts/exynos')
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts | 2 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 10 |
2 files changed, 7 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts index 2b30a7458297..eec3192c0631 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -50,6 +50,7 @@ }; &serial_0 { + pinctrl-0 = <&uart0_bus_dual>; status = "okay"; }; @@ -74,6 +75,7 @@ }; &usi_0 { + samsung,clkreq-on; /* needed for UART mode */ status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index c4cfa93e4c2e..dbe0819b44c2 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -352,11 +352,11 @@ }; usi_0: usi@103000c0 { - compatible = "samsung,exynos850-usi"; + compatible = "samsung,exynosautov9-usi", + "samsung,exynos850-usi"; reg = <0x103000c0 0x20>; samsung,sysreg = <&syscon_peric0 0x1000>; samsung,mode = <USI_V2_UART>; - samsung,clkreq-on; /* needed for UART mode */ #address-cells = <1>; #size-cells = <1>; ranges; @@ -365,13 +365,13 @@ clock-names = "pclk", "ipclk"; status = "disabled"; - /* USI: UART */ serial_0: serial@10300000 { - compatible = "samsung,exynos850-uart"; + compatible = "samsung,exynosautov9-uart", + "samsung,exynos850-uart"; reg = <0x10300000 0xc0>; interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&uart0_bus_dual>; + pinctrl-0 = <&uart0_bus>; clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>; clock-names = "uart", "clk_uart_baud0"; |