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authorHou Zhiqiang <Zhiqiang.Hou@nxp.com>2018-12-18 07:19:32 +0300
committerShawn Guo <shawnguo@kernel.org>2019-01-11 10:28:55 +0300
commit881e90d27a07f723b5c02bc04f2a63f7517c1068 (patch)
tree665e76264a937c801b61eb2d287f51813fdcc90d /arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
parenta2b91efd30eb7fb77608c3d3e6acaafdf3a8efc4 (diff)
downloadlinux-881e90d27a07f723b5c02bc04f2a63f7517c1068.tar.xz
arm64: dts: layerscape: add num-viewport property for PCIe DT nodes
Add num-viewport property for PCIe DT nodes to specify how many viewports are implemented. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 9a2106e60e19..3df0ef93a9bf 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -644,6 +644,7 @@
device_type = "pci";
dma-coherent;
num-lanes = <4>;
+ num-viewport = <8>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@@ -670,6 +671,7 @@
device_type = "pci";
dma-coherent;
num-lanes = <2>;
+ num-viewport = <8>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
@@ -696,6 +698,7 @@
device_type = "pci";
dma-coherent;
num-lanes = <2>;
+ num-viewport = <8>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */