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| author | Alexander Stein <alexander.stein@ew.tq-group.com> | 2023-12-18 17:23:12 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2024-02-01 13:08:48 +0300 |
| commit | 6196fe777513b0dc65c831bcec3adc678cfce6f6 (patch) | |
| tree | 1bc5ece2a9bb52b3dd1683e893aa9e1b473995c1 /arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi | |
| parent | 5136ea6b109de66b1327a3069f88ad8f5efb37b2 (diff) | |
| download | linux-6196fe777513b0dc65c831bcec3adc678cfce6f6.tar.xz | |
arm64: dts: imx8qxp: add GPU nodes
Add the DT node for the GPU core found on the i.MX8QXP.
etnaviv-gpu 53100000.gpu: model: GC7000, revision: 6214
[drm] Initialized etnaviv 1.3.0 20151214 for etnaviv on minor 0
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi new file mode 100644 index 000000000000..9b8a44aa63d6 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + * Dong Aisheng <aisheng.dong@nxp.com> + */ + +#include <dt-bindings/firmware/imx/rsrc.h> + +gpu0_subsys: bus@53000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x53000000 0x0 0x53000000 0x1000000>; + + gpu_3d0: gpu@53100000 { + compatible = "vivante,gc"; + reg = <0x53100000 0x40000>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_MISC>; + clock-names = "core", "shader"; + assigned-clocks = <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_GPU_0_PID0 IMX_SC_PM_CLK_MISC>; + assigned-clock-rates = <700000000>, <850000000>; + power-domains = <&pd IMX_SC_R_GPU_0_PID0>; + }; +}; |