diff options
author | Alexander Stein <alexander.stein@ew.tq-group.com> | 2023-05-16 08:50:06 +0300 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2023-05-27 11:37:51 +0300 |
commit | b0d051afedad32623fa933ac2c44e77b8174f00a (patch) | |
tree | 3647a0f8974e5184531b7a5b0db36f65dacfbdf5 /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
parent | 64d45a1a27159229fd55deab9eb2001add8adc9b (diff) | |
download | linux-b0d051afedad32623fa933ac2c44e77b8174f00a.tar.xz |
arm64: dts: imx8mp: move noc node to correct position
The base address of NOC is bigger than aips5, but smaller than aips4.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 245c560674de..e781a07cec45 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1154,26 +1154,6 @@ }; }; - noc: interconnect@32700000 { - compatible = "fsl,imx8mp-noc", "fsl,imx8m-noc"; - reg = <0x32700000 0x100000>; - clocks = <&clk IMX8MP_CLK_NOC>; - #interconnect-cells = <1>; - operating-points-v2 = <&noc_opp_table>; - - noc_opp_table: opp-table { - compatible = "operating-points-v2"; - - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - }; - - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - }; - }; - }; - aips5: bus@30c00000 { compatible = "fsl,aips-bus", "simple-bus"; reg = <0x30c00000 0x400000>; @@ -1325,6 +1305,26 @@ }; }; + noc: interconnect@32700000 { + compatible = "fsl,imx8mp-noc", "fsl,imx8m-noc"; + reg = <0x32700000 0x100000>; + clocks = <&clk IMX8MP_CLK_NOC>; + #interconnect-cells = <1>; + operating-points-v2 = <&noc_opp_table>; + + noc_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + }; + }; + }; + aips4: bus@32c00000 { compatible = "fsl,aips-bus", "simple-bus"; reg = <0x32c00000 0x400000>; |